Semiconductor device, semiconductor device manufacturing method, inverter circuit, drive device, vehicle, and elevator

Patent metadata

Field	Value
Publication number	US-12328900-B2
Application number	US-202217654407-A
Country	US
Kind code	B2
Filing date	Mar 11, 2022
Priority date	Sep 16, 2021
Publication date	Jun 10, 2025
Grant date	Jun 10, 2025

Abstract

A semiconductor device of embodiments includes: a silicon carbide layer including a trench, a n-type first SiC region, a p-type second SiC region on the first SiC region, a n-type third SiC region on the second SiC region, a fourth SiC region of p-type between the first trench and the first SiC region, and a fifth SiC region electrically connecting the second SiC region and the fourth SiC region; and a gate electrode in the trench. The first trench has a first region extending in a first direction, a second region continuous with the first region, and a third region continuous with the second region and extending in the first direction. The second width of the second region in the second direction is larger than the first width of the first region in the second direction. The fifth SiC region is disposed in the second direction of the second region.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a silicon carbide layer having a first face and a second face opposite to the first face, the first face being parallel to a first direction and a second direction, the second direction being perpendicular to the first direction, and the silicon carbide layer including:
a first trench disposed on a side of the first face and including a first region, a second region, and a third region, the first region extending in the first direction, the second region continuous with the first region, the third region continuous with the second region and extending in the first direction, a second width of the second region in the second direction being larger than a first width of the first region in the second direction, and the second width of the second region in the second direction being larger than a third width of the third region in the second direction;
a first silicon carbide region of n-type;
a second silicon carbide region of p-type disposed between the first silicon carbide region and the first face, a distance from the second face to the second silicon carbide region being larger than a distance from the second face to the first trench;
a third silicon carbide region of n-type disposed between the second silicon carbide region and the first face;
a fourth silicon carbide region of p-type disposed between the first trench and the first silicon carbide region; and
a fifth silicon carbide region disposed in the second direction of the second region and electrically connecting the second silicon carbide region and the fourth silicon carbide region to each other;

a gate electrode disposed in the first trench;
a gate insulating layer disposed between the gate electrode and the silicon carbide layer;
a first electrode disposed on the side of the first face of the silicon carbide layer and in contact with the third silicon carbide region; and
a second electrode disposed on a side of the second face of the silicon carbide layer.

2. The semiconductor device according to claim 1 ,
wherein the fifth silicon carbide region is in contact with the second silicon carbide region, and the fifth silicon carbide region is in contact with the fourth silicon carbide region.

3. The semiconductor device according to claim 1 ,
wherein the second silicon carbide region includes a first portion and a second portion, the first portion is disposed between the first trench and the second portion, a p-type impurity concentration in the second portion is higher than a p-type impurity concentration in the first portion, and
the fifth silicon carbide region is in contact with the second portion.

4. The semiconductor device according to claim 1 ,
wherein the second region extends in the second direction.

5. The semiconductor device according to claim 1 ,
wherein the second width is equal to or more than twice the first width.

6. The semiconductor device according to claim 1 ,
wherein a part of the first silicon carbide region is disposed between the first trench and the fifth silicon carbide region.

7. The semiconductor device according to claim 1 ,
wherein a p-type impurity concentration in the fourth silicon carbide region between the second region and the first silicon carbide region is higher than a p-type impurity concentration in the fourth silicon carbide region between the first region and the first silicon carbide region.

8. The semiconductor device according to claim 1 ,
wherein a length of the fifth silicon carbide region in the first direction is equal to or less than 1.5 times a length of the second region in the first direction.

9. The semiconductor device according to claim 1 ,
wherein a p-type impurity concentration in the fifth silicon carbide region is lower than a p-type impurity concentration in the fourth silicon carbide region.

10. The semiconductor device according to claim 1 ,
wherein the first region and the third region face each other in the second direction.

11. The semiconductor device according to claim 10 ,
wherein the first trench further includes a fourth region facing the second region in the first direction and continuous with the first region and the third region.

12. The semiconductor device according to claim 1 ,
wherein the silicon carbide layer further includes a second trench adjacent to the first region in the second direction, the second trench is disposed on the side of the first face, the second trench extends in the first direction, and a part of the first electrode is disposed inside the second trench.

13. The semiconductor device according to claim 1 ,
wherein the fifth silicon carbide region in contact with the first trench is disposed in the first direction of the second region.

14. An inverter circuit comprising the semiconductor device according to claim 1 .

15. A drive device comprising the semiconductor device according to claim 1 .

16. A vehicle comprising the semiconductor device according to claim 1 .

17. An elevator comprising the semiconductor device according to claim 1 .

Assignees

• Toshiba Kk

Inventors

• Kimoto Shinichi
• Iijima Ryosuke
• Harada Shinsuke

Classifications

• H10P30/2042

  into crystalline silicon carbide · CPC title

• H10P30/21

  of electrically active species · CPC title

• H10D62/8325

  Silicon carbide · CPC title

• H10D62/314

  having vertical doping variations  (vertical IGFETs H10D30/63) · CPC title

• H10D62/127

  of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs · CPC title