Method and apparatus for applying phase shift to digital phase-locked loop circuit to adjust frequency of local oscillator signal used by down-conversion

Patent metadata

Field	Value
Publication number	US-12328126-B2
Application number	US-202318229161-A
Country	US
Kind code	B2
Filing date	Aug 1, 2023
Priority date	Dec 20, 2022
Publication date	Jun 10, 2025
Grant date	Jun 10, 2025

Abstract

A wireless communication device includes a receiver circuit, a phase shift control circuit, and a digital phase-locked loop (DPLL) circuit. The receiver circuit includes a down-converter circuit that is used to apply down-conversion to an input signal according to a local oscillator (LO) signal. The phase shift control circuit is used to generate a phase shift signal. The DPLL circuit is used to generate the LO signal locked to an initial frequency under a frequency-lock state. In response to the phase shift signal, the DPLL circuit is further used to make the LO signal have a different frequency without leaving the frequency-lock state.

First claim

What is claimed is:

1. A wireless communication device comprising:
a receiver circuit, comprising:
a down-converter circuit, arranged to apply down-conversion to an input signal according to a local oscillator (LO) signal;

a phase shift control circuit, arranged to generate a phase shift signal;
a digital phase-locked loop (DPLL) circuit, arranged to generate the LO signal locked to an initial frequency under a frequency-lock state, wherein in response to the phase shift signal, the DPLL circuit is further arranged to make the LO signal have a different frequency without leaving the frequency-lock state; and
a transmitter circuit;
wherein the DPLL circuit is a part of the transmitter circuit; and the DPLL circuit is used by the transmitter circuit for receiving a phase modulation signal and generating a digitally controlled oscillator (DCO) output that contains phase information when the wireless communication device operates under a transmit (TX) mode, and is re-used by the receiver circuit when the wireless communication device operates under a receive (RX) mode.

2. The wireless communication device of claim 1 , wherein the DPLL circuit is a two-point modulation DPLL circuit with two modulation inputs both derived from the phase shift signal.

3. The wireless communication device of claim 1 , wherein the phase shift signal delivers a sequence of different phase shift values; in response to one of the different phase shift values, the DPLL circuit makes the LO signal have a first frequency different from the initial frequency without leaving the frequency-lock state; and in response to another of the different phase shift values, the DPLL circuit makes the LO signal have a second frequency different from the initial frequency without leaving the frequency-lock state.

4. The wireless communication device of claim 1 , wherein the wireless communication device is a Bluetooth device.

5. The wireless communication device of claim 4 , wherein the phase shift control circuit generates the phase shift signal during received signal strength indication (RSSI) measurement of a plurality of channels of the Bluetooth device.

6. A wireless communication method comprising:
applying down-conversion to an input signal according to a local oscillator (LO) signal;
utilizing a digital phase-locked loop (DPLL) circuit to generate the LO signal locked to an initial frequency under a frequency-lock state; and
generating and outputting a phase shift signal to the DPLL circuit, wherein in response to the phase shift signal, the DPLL circuit makes the LO signal have a different frequency without leaving the frequency-lock state;
wherein the DPLL circuit is used to receive a phase modulation signal and generate a digitally controlled oscillator (DCO) output that contains phase information under a transmit (TX) mode, and is re-used under a receive (RX) mode.

7. The wireless communication method of claim 6 , wherein the DPLL circuit is a two-point modulation DPLL circuit with two modulation inputs both derived from the phase shift signal.

8. The wireless communication method of claim 6 , wherein the phase shift signal delivers a sequence of different phase shift values; in response to one of the different phase shift values, the DPLL circuit makes the LO signal have a first frequency different from the initial frequency without leaving the frequency-lock state; and in response to another of the different phase shift values, the DPLL circuit makes the LO signal have a second frequency different from the initial frequency without leaving the frequency-lock state.

9. The wireless communication method of claim 6 , wherein the wireless communication method is employed by a Bluetooth device.

10. The wireless communication method of claim 9 , wherein generating and outputting the phase shift signal to the DPLL circuit comprises:
generating the phase shift signal during received signal strength indication (RSSI) measurement of a plurality of channels of the Bluetooth device.

Assignees

• Airoha Tech Corp

Inventors

• Huang Chun-Yuan
• Chang Chin-Chang
• Chen Jeng-Hong
• Zhang Yun-Xuan

Classifications

• H03L7/0814

  the phase shifting device being digitally controlled · CPC title

• H03C3/0966

  modulating the reference clock · CPC title

• H03C3/0991

  including calibration means or calibration methods · CPC title

• H03C3/0975

  applying frequency modulation in the phase locked loop at components other than the divider, the voltage controlled oscillator or the reference clock · CPC title

• H03L7/0991 Primary

  the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider (H03L7/0995 takes precedence; fixed oscillators with means for selecting among various phases H03L7/0814) · CPC title