Processor unit resource exhaustion detection and remediation

Patent metadata

Field	Value
Publication number	US-12326810-B2
Application number	US-202117185648-A
Country	US
Kind code	B2
Filing date	Feb 25, 2021
Priority date	Dec 26, 2020
Publication date	Jun 10, 2025
Grant date	Jun 10, 2025

Abstract

A performance monitor provides cache miss stall and memory bandwidth usage metric samples to a resource exhaustion detector. The detector can detect the presence of last-level cache and memory bandwidth exhaustion conditions based on the metric samples. If cache miss stalls and memory bandwidth usage are both trending up, the detector reports a memory bandwidth exhaustion condition to a resource controller. If cache miss stalls are trending up and memory bandwidth usage is trending down, the detector reports a last-level cache exhaustion condition to the resource controller. The resource controller can allocate additional last-level cache or memory bandwidth to the processor unit to remediate the resource exhaustion condition. If bandwidth-related metric samples indicate that a processor unit may be overloaded due to receiving high bandwidth traffic, the resource controller can take a traffic rebalancing remedial action.

First claim

We claim:

1. A method, comprising:
detecting a resource exhaustion condition in response to:
(i) determining that cache miss stalls for a processor unit executing an application are trending up based on a plurality of cache miss stall metric samples; and
(ii) determining that memory bandwidth usage for the processor unit executing the application is trending up or trending down based on a plurality of memory bandwidth usage metric samples, wherein individual of the plurality of memory bandwidth usage metric samples indicate a measure of memory bandwidth used by the processor unit executing the application; and

causing a remedial action to be taken in response to detecting the resource exhaustion condition.

2. The method of claim 1 , wherein the resource exhaustion condition is detected in response to determining that the cache miss stalls for the processor unit are trending up and determining that the memory bandwidth usage is trending up, the remedial action comprising allocating additional memory bandwidth for use by the processor unit.

3. The method of claim 2 , the allocating additional memory bandwidth for the processor unit comprising reallocating memory bandwidth allocated to a second processor unit to the processor unit.

4. The method of claim 1 , wherein the resource exhaustion condition is detected in response to determining that the cache miss stalls for the processor unit are trending up and determining that the memory bandwidth usage is trending down, the remedial action comprising allocating additional last-level cache for use by the processor unit.

5. The method of claim 4 , the allocating additional last-level cache for use by the processor unit comprising reallocating cache allocated to a second processor unit to the processor unit.

6. The method of claim 1 , wherein the processor unit is executing an application, the remedial action comprises scaling up a number of processor units executing the application.

7. The method of claim 1 , wherein the resource exhaustion condition is detected in further response to: (iii) determining that a ratio of a total traffic bandwidth generated by a traffic source to a memory bandwidth usage of the processor unit exceeds a traffic rebalancing threshold.

8. The method of claim 7 , wherein the remedial action comprises modifying one or more traffic routing rules that specify which traffic received at the traffic source is to be routed to the processor unit.

9. The method of claim 7 , wherein the remedial action comprises redirecting at least a portion of traffic provided by the traffic source to the processor unit to a second processor unit.

10. The method of claim 1 , wherein the plurality of cache miss stall metric samples comprises three or more cache miss stall metric samples and the plurality of memory bandwidth usage metric samples comprises three or more memory bandwidth usage metric samples.

11. A computing system comprising:
an integrated circuit component comprising a processor unit;
resource exhaustion detection circuitry to detect a resource exhaustion condition in response to:
(i) determining that cache miss stalls for the processor unit executing an application are trending up based on a plurality of cache miss stall metric samples; and
(ii) determining that memory bandwidth usage for the processor unit executing the application is trending up or trending down based on a plurality of memory bandwidth usage metric samples, wherein individual of the plurality of memory bandwidth usage metric samples indicate a measure of memory bandwidth used by the processor unit executing the application; and

a resource controller to cause a remedial action to be taken in response to detection of the resource exhaustion condition.

12. The computing system of claim 11 , wherein the resource exhaustion condition is detected in response to determining that the cache miss stalls for the processor unit are trending up and that the memory bandwidth usage is trending up, the remedial action comprising to allocate additional memory bandwidth for use by the processor unit.

13. The computing system of claim 12 , to allocate additional memory bandwidth for the processor unit comprising to reallocate memory bandwidth allocated to a second processor unit to the processor unit.

14. The computing system of claim 11 , wherein the resource exhaustion condition is detected in response to determining that the cache miss stalls for the processor unit are trending up and that the memory bandwidth usage is trending down, the remedial action comprising to allocate additional last-level cache for use by the processor unit.

15. The computing system of claim 14 , to allocate additional last-level cache for use by the processor unit comprising to reallocate cache allocated to a second processor unit to the processor unit.

16. One or more non-transitory computer-readable storage media storing computer-executable instructions that, when executed, cause a computing system to:
detect a resource exhaustion condition in response to:
(i) determining that cache miss stalls for a processor unit executing an application are trending up based on a plurality of cache miss stall metric samples; and
(ii) determining that memory bandwidth usage for the processor unit executing the application is trending up or trending down based on a plurality of memory bandwidth usage metric samples, wherein individual of the plurality of memory bandwidth usage metric samples indicate a measure of memory bandwidth used by the processor unit executing the application; and

cause a remedial action to be taken in response to detection of the resource exhaustion condition.

17. The one or more non-transitory computer-readable storage media of claim 16 , wherein the resource exhaustion condition is detected in response to determining that the cache miss stalls for the processor unit are trending up and that the memory bandwidth usage is trending up, the remedial action comprising to allocate additional memory bandwidth for use by the processor unit.

18. The one or more non-transitory computer-readable storage media of claim 17 , to allocate additional memory bandwidth for the processor unit comprising to reallocate memory bandwidth allocated to a second processor unit to the processor unit.

19. The one or more non-transitory computer-readable storage media of claim 16 , wherein the resource exhaustion condition is detected in response to determining that the cache miss stalls for the processor unit are trending up and that the memory bandwidth usage is trending down, the remedial action comprising to allocate additional last-level cache for use by the processor unit.

20. The one or more non-transitory computer-readable storage media of claim 19 , to allocate additional last-level cache for use by the processor unit comprising to reallocate cache allocated to a second processor unit to the processor unit.

21. The one or more non-transitory computer-readable storage media of claim 16 , wherein the resource exhaustion condition is detected in further response to: (iii) determining that a ratio of a total traffic bandwidth generated by a traffic source to a memory bandwidth usage of the processor unit exceeds a traffic rebalancing threshold.

22. The one or more non-transitory computer-readable storage media of claim 21 , wherein the remedial action comprises to modify one or more traffic routing rules that specify which traffic received at a traffic source is to be routed to the processor uni

Assignees

• Intel Corp

Inventors

• Browne John J
• Boczkowski Adrian
• Cornu Marcel D
• Hunt David
• Jain Shobhi
• Kantecki Tomasz
• Ma Liang
• Macnamara Chris M
• Misra Amruta
• Nally Terence

Classifications

• G06F9/5016

  the resource being the memory · CPC title

• G06F11/0793

  Remedial or corrective actions (recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40) · CPC title

• G06F9/5022

  Mechanisms to release resources · CPC title

• G06F2212/1021

  Hit rate improvement · CPC title

• G06F12/0871

  Allocation or management of cache space · CPC title