Display device

Patent metadata

Field	Value
Publication number	US-12324290-B2
Application number	US-202118697320-A
Country	US
Kind code	B2
Filing date	Sep 30, 2021
Priority date	Sep 30, 2021
Publication date	Jun 3, 2025
Grant date	Jun 3, 2025

Abstract

The display device includes a substrate, first assembly wiring, second assembly wiring, a partition, and first to third semiconductor light emitting devices. Each of the plurality of pixels includes first to third sub-pixels. The first to third assembly holes are located in the first to third sub-pixels. The first assembly wiring includes a first bus wiring in a plurality of pixels, and a plurality of first branch wirings branching from the first bus wiring. The second assembly wiring includes a second bus wiring in a plurality of pixels, and a plurality of second branch wirings branching from the second bus wiring. Each of the first to third semiconductor light emitting devices may be disposed in first to third assembly holes between the first bus wiring, the second bus wiring, the first branch wiring, and the second branch wiring.

First claim

The invention claimed is:

1. A display device, comprising:
a substrate including a plurality of pixels, each of the plurality of pixels including a first to third sub-pixels;
a first assembly wiring on the substrate;
a second assembly wiring on the substrate;
a partition having a first to third assembly holes in the first to third sub-pixels of each of the plurality of pixels; and
a first to third semiconductor light emitting devices;
wherein the first assembly wiring comprises a first bus wiring a plurality of first branch wirings branched from the first bus wiring, and a plurality of first assembly electrodes branched from each of the plurality of first branch wirings,
wherein the second assembly wiring comprises a second bus wiring, and a plurality of second branch wirings branched from the second bus wiring,
wherein each of the first to third semiconductor light emitting devices is disposed in the first to third assembly holes between the first bus wiring, the second bus wiring, a first branch wiring of the plurality of first branch wirings, and a second branch wiring of the plurality of second branch wirings,
wherein each of the first assembly electrodes is branched from the first bus wiring, and
wherein one of the first to third semiconductor light emitting devices is disposed on the first assembly wiring branched from the first bus wiring and a second assembly electrode branched from the second branch wiring.

2. The display device according to claim 1 ,
wherein the second assembly wiring comprises a plurality of second assembly electrodes branched from each of the plurality of second branch wirings and facing the plurality of first assembly electrodes, and
wherein each of the first to third semiconductor light emitting devices is disposed in the first to third assembly holes on a first assembly electrode of the plurality of first assembly electrodes and the second assembly electrode.

3. The display device according to claim 1 , wherein the second assembly electrode is branched from the second bus wiring, and
wherein another semiconductor light emitting device among the first to third semiconductor light emitting devices is disposed on a first assembly electrode of the plurality of first assembly electrodes branched from the first branch wiring and a second assembly electrode branched from the second bus wiring.

4. The display device according to claim 1 , wherein a width of the first bus wiring is greater than a width of a first assembly electrode of the plurality of first assembly electrodes, and
wherein a width of the second bus wiring is greater than a width of the second assembly electrode.

5. The display device according to claim 1 , wherein the first to third semiconductor light emitting devices comprise a red semiconductor light emitting device, a green semiconductor light emitting device, and a blue semiconductor light emitting device.

6. The display device according to claim 1 , wherein the first bus wiring and the second bus wiring are arranged side by side.

7. The display device according to claim 1 , wherein the first branch wiring and the second branch wiring are arranged side by side.

8. A display device, comprising:
a substrate including a plurality of pixels, each of the plurality of pixels including a first to third sub-pixels;
a first assembly wiring on the substrate;
a second assembly wiring on the substrate;
a partition having a first to third assembly holes in the first to third sub-pixels of each of the plurality of pixels; and
a first to third semiconductor light emitting devices;
wherein the first assembly wiring comprises a first bus wiring, and a plurality of first branch wirings branched from the first bus wiring,
wherein the second assembly wiring comprises a second bus wiring, and a plurality of second branch wirings branched from the second bus wiring,
wherein each of the first to third semiconductor light emitting devices is disposed in the first to third assembly holes between the first bus wiring, the second bus wiring, a first branch wiring of the plurality of first branch wirings, and a second branch wiring of the plurality of second branch wirings, and
wherein the first branch wiring comprises a first-first branch wiring branched from the first bus wiring, and a plurality of first-second branch wirings branched from the first-first branch wiring.

9. The display device according to claim 8 , wherein the plurality of pixels comprise a first pixel and a second pixel adjacent to each other,
wherein one of the first-second branch wiring of the plurality of the first-second branch wiring is disposed in the first pixel, and
wherein another first-second branch wiring of the plurality of the first-second branch wiring is disposed in the second pixel.

10. The display device according to claim 9 , wherein the second branch wiring comprises a second-first branch wiring branched from the second bus wiring, and a plurality of second-second branch wirings branched from the second-first branch wiring.

11. The display device according to claim 10 , wherein the plurality of pixels comprise a third pixel adjacent to the second pixel,
wherein one of second-second branch wiring of the plurality of second-second branch wirings is disposed in the second pixel, and
wherein another second-second branch wiring of the plurality of second-second branch wirings is disposed in the third pixel.

12. The display device according to claim 10 , wherein a width of the first bus wiring is greater than a width of the first-first branch wiring, and
wherein a width of the second bus wiring is greater than a width of the first-first branch wiring.

13. The display device according to claim 10 , wherein a width of the first bus wiring and a width of the second bus wiring are the same, and
wherein a width of the first-first branch wiring and a width of the branch wiring are the same.

14. The display device according to claim 10 , wherein a distance between the first-first branch wiring and a second-second branch wiring of the plurality of second-second branch wirings is greater than a width of the first-first branch wiring.

15. The display device according to claim 10 , wherein at least one semiconductor light emitting device among the first to third semiconductor light emitting devices are configured to have a minor axis and a major axis, and
wherein a distance between the first bus wiring and the second-first branch wiring is greater than a length of the major axis of the at least one semiconductor light emitting device.

16. The display device according to claim 15 , wherein a distance between the second bus wiring and the first-first branch wiring is greater than the length of the major axis of the at least one semiconductor light emitting device.

17. The display device according to claim 15 , wherein a distance between the first-first branch wiring and a second-second branch wiring of the plurality of second-second branch wirings is greater than the length of the major axis of the at least one semiconductor light emitting device.

Assignees

• Lg Electronics Inc

Inventors

• Kim Jungsub
• Park Changseo
• Kim Gunho
• Shin Yongil
• Kim Yoonchul

Classifications

• H10W90/00

  Package configurations · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10H20/857 Primary

  Interconnections, e.g. lead-frames, bond wires or solder balls · CPC title

• H10H20/85

  Packages · CPC title

• H10H20/83

  Electrodes · CPC title