Optoelectronic semiconductor chip and method for producing optoelectronic semiconductor chips

Patent metadata

Field	Value
Publication number	US-12324274-B2
Application number	US-202017775195-A
Country	US
Kind code	B2
Filing date	Oct 6, 2020
Priority date	Nov 7, 2019
Publication date	Jun 3, 2025
Grant date	Jun 3, 2025

Abstract

In an embodiment an optoelectronic semiconductor chip includes a semiconductor layer sequence including a first semiconductor region of a first conductivity type, an active zone having a multiple quantum well structure composed of a plurality of quantum well layers and barrier layers, a second semiconductor region of a second conductivity type and a plurality of channels extending through the active zone, wherein the second semiconductor region is located in the channels and is configured for lateral current injection into the active zone, wherein the channels have a first aperture half-angle in the first semiconductor region and a second aperture half-angle in the active zone, and wherein the second aperture half-angle is greater than zero and less than the first aperture half-angle.

First claim

The invention claimed is:

1. An optoelectronic semiconductor chip comprising:
a semiconductor layer sequence comprising:
a first semiconductor region of a first conductivity type;
an active zone configured to generate radiation, the active zone having a multiple quantum well structure composed of a plurality of quantum well layers and barrier layers;
a second semiconductor region of a second conductivity type; and
a plurality of channels extending through the active zone and being different and distinct from the active zone,

wherein the active zone lies between the first semiconductor region and the second semiconductor region as seen along a main growth direction of the semiconductor layer sequence,
wherein the second semiconductor region is located in the channels and is configured for lateral current injection into the active zone,
wherein the channels have a first aperture half-angle in the first semiconductor region and a second aperture half-angle in the active zone, and
wherein the second aperture half-angle is greater than zero and less than the first aperture half-angle.

2. The optoelectronic semiconductor chip of claim 1 ,
wherein the channels are approximately V-shaped in a cross section parallel to the main growth direction, and
wherein the second aperture half-angle is at least 55% and at most 85% of the first aperture half-angle.

3. The optoelectronic semiconductor chip of claim 1 ,
wherein the semiconductor layer sequence is based on AlInGaN, the first conductivity type is n-conductive and the second conductivity type is p-conductive, and
wherein the first aperture half-angle is between 15° and 35° inclusive.

4. The optoelectronic semiconductor chip of claim 1 , wherein the second aperture half-angle is 18°+/−10°.

5. The optoelectronic semiconductor chip of claim 1 ,
wherein side walls of the channels are formed by more thinly grown continuations of layers of the multiple quantum well structure, and
wherein a dopant concentration of a sublayer, closest to the side walls, of the second semiconductor region in the channels is at least 7×10 18 per cm 3 and decreases by at most 40% toward the multiple quantum well structure.

6. The optoelectronic semiconductor chip of claim 5 , wherein the continuations of the layers of the multiple quantum well structure have, in a direction perpendicular to the side walls, a thickness of between 10% and 40% inclusive of an overall thickness of the multiple quantum well structure, measured along the main growth direction and next to the channels.

7. The optoelectronic semiconductor chip of claim 1 , wherein the semiconductor chip is configured to provide a charge carrier recombination rate in the quantum well layers that varies by at most a factor of 3 over the multiple quantum well structure.

8. The optoelectronic semiconductor chip of claim 1 , wherein a bending point, at which the first aperture half-angle of the channels changes to the second aperture half-angle, lies with a tolerance of at most 50 nm on a first of the quantum well layers along the main growth direction.

9. The optoelectronic semiconductor chip of claim 1 , wherein the channels are present in a plan view of the semiconductor layer sequence with a numerical surface density of between 5×10 7 per cm 2 and 1×10 9 per cm 2 inclusive.

10. The optoelectronic semiconductor chip of claim 1 ,
wherein the channels have a diameter of between 150 nm and 450 nm inclusive on a last of the quantum well layers along the main growth direction, and
wherein a thickness of the semiconductor layer sequence is overall between 3 μm and 15 μm inclusive.

11. The optoelectronic semiconductor chip of claim 1 ,
wherein the first semiconductor region comprises a generation layer, and
wherein at least 80% of the channels are formed in or on the generation layer.

12. The optoelectronic semiconductor chip of claim 1 ,
wherein each quantum well layer has a thickness of between 2 nm and 5 nm inclusive,
wherein each barrier layer has a thickness of between 4 nm and 15 nm inclusive, and
wherein the active zone comprises between 5 and 20 of the quantum well layers inclusive.

13. The optoelectronic semiconductor chip of claim 1 , wherein the optoelectronic semiconductor chip is a light-emitting diode configured to generate blue light and/or green light and/or yellow light and/or red light and/or ultraviolet radiation.

14. A production method for optoelectronic semiconductor chips, wherein each semiconductor chip is the semiconductor chip of claim 1 , the method comprising:
growing the first semiconductor region and initiating the channels, the channels growing with the first aperture half-angle;
growing the active zone, the channels growing with the second aperture half-angle; and
growing the second semiconductor region and filling the channels with a semiconductor material of the second semiconductor region.

15. The method of claim 14 ,
wherein the barrier layers are grown at a temperature which is at least 20° C. and at most 70° C. higher than a temperature during a growth of the quantum well layers, and both temperatures are between 700° C. and 950° C. inclusive, and
wherein the barrier layers are grown undoped from GaN and the quantum well layers are grown undoped from InGaN, and a growth rate for the quantum well layers is less than for the barrier layers.

16. An optoelectronic semiconductor chip comprising:
a semiconductor layer sequence comprising:
a first semiconductor region of a first conductivity type;
an active zone configured to generate radiation, the active zone having a multiple quantum well structure composed of a plurality of quantum well layers and barrier layers;
a second semiconductor region of a second conductivity type; and
a plurality of channels extending through the active zone and being different and distinct from the active zone,

wherein the active zone lies between the first semiconductor region and the second semiconductor region as seen along a main growth direction of the semiconductor layer sequence,
wherein the second semiconductor region is located in the channels and is configured for lateral current injection into the active zone,
wherein each channel of at least some of the channels has a first aperture half-angle in the first semiconductor region and a second aperture half-angle in the active zone, and
wherein the second aperture half-angle is greater than zero and less than the first aperture half-angle.

17. The optoelectronic semiconductor chip of claim 16 ,
wherein the first aperture half-angle is between 15° and 35° inclusive, and
wherein the second aperture half-angle is at least 55% and at most 85% of the first aperture half-angle.

18. The optoelectronic semiconductor chip of claim 17 , wherein the second aperture half-angle is 18°+/−10°.

19. The optoelectronic semiconductor chip of claim 16 ,
wherein the semiconductor layer sequence is based on AlInGaN,
wherein the first conductivity type is n-conductive, and
wherein the second conductivity type is p-conductive.

20. An optoelectronic semiconductor chip comprising:
a semiconductor layer sequence comprising:
a first semiconductor region of a first conductivity type;
an active zone configured to generate radiation, the active zone having a multiple quantum well structure composed of a plurality of quantum well layers and barrier layers;
a second semiconductor region of a second conductivity type; and
a plurality of channels extending orthogonally through a main extens

Assignees

• Osram Opto Semiconductors Gmbh

Inventors

• Chen Xiaojun
• Wang Heng
• Na Jong Ho
• Gomez-Iglesias Alvaro
• Off Jürgen
• Drechsel Philipp
• Lehnhardt Thomas

Classifications

• H10W90/00

  Package configurations · CPC title

• H10H20/8215

  characterised by crystalline imperfections, e.g. dislocations; characterised by the distribution of dopants, e.g. delta-doping · CPC title

• H10H20/825

  containing nitrogen, e.g. GaN · CPC title

• H10H20/821

  of the light-emitting regions, e.g. non-planar junctions · CPC title

• H10H20/816

  having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures · CPC title