Thyristor control device

Patent metadata

Field	Value
Publication number	US-12323136-B2
Application number	US-202318373083-A
Country	US
Kind code	B2
Filing date	Sep 26, 2023
Priority date	Sep 7, 2020
Publication date	Jun 3, 2025
Grant date	Jun 3, 2025

Abstract

A control device includes a triac and a first diode that is series-connected between the triac and a first terminal of the device that is configured to be connected to a cathode gate of a thyristor. A second terminal of the control device is configured to be connected to an anode of the thyristor. The triac has a gate connected to a third terminal of the device that is configured to receive a control signal. The thyristor is a component part of one or more of a rectifying bridge circuit, an in-rush current limiting circuit or a solid-state relay circuit.

First claim

The invention claimed is:

1. A solid state relay, comprising:
a first thyristor and a second thyristor connected in antiparallel between a first relay terminal and a second relay terminal;
wherein an anode of the first thyristor is connected to the first relay terminal; and
a control device comprising:
a triac; and
a first diode series-connected between the triac and a first terminal of the control device, wherein the first terminal is configured to be connected to a cathode gate of the first thyristor; and
wherein a second terminal of the control device is configured to be connected to an anode of the first thyristor and the first relay terminal;
wherein the triac has a gate connected to a third terminal of the control device, wherein the third terminal is configured to receive a control signal.

2. The relay according to claim 1 , further comprising a circuit configured to deliver a control signal to the third terminal of the control device, the circuit being connected to the first relay terminal and being configured to be electrically powered with a power supply potential referenced to the first relay terminal.

3. The relay according to claim 2 , wherein the circuit is further configured to deliver another control signal to the gate of the second thyristor.

4. The relay according to claim 3 , wherein the another control signal is directly applied to the gate of the second thyristor.

5. The relay according to claim 3 , wherein the another control signal is coupled to the gate of the second thyristor by a diode.

6. The relay according to claim 3 , wherein a cathode of the second thyristor is connected to the first relay terminal, and an anode of the second thyristor is connected to the second relay terminal.

7. The relay according to claim 6 , wherein a cathode of the first thyristor is connected to the second relay terminal.

8. An integrated circuit comprising the solid state relay according to claim 1 .

Assignees

• St Microelectronics Tours Sas

Inventors

• Pichon Romain
• Hague Yannick

Classifications

• H03K17/76

  Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors (logic circuits H03K19/00; code converters H03M5/00, H03M7/00) · CPC title

• H03K17/305

  in thyristor switches · CPC title

• H02M7/125

  Avoiding or suppressing excessive transient voltages or currents · CPC title

• H02M7/062

  Avoiding or suppressing excessive transient voltages or currents · CPC title

• H02M1/0085

  Partially controlled bridges · CPC title