Broadband amplifier with DC gain error correction

Patent metadata

Field	Value
Publication number	US-12323116-B2
Application number	US-202217733336-A
Country	US
Kind code	B2
Filing date	Apr 29, 2022
Priority date	Apr 29, 2022
Publication date	Jun 3, 2025
Grant date	Jun 3, 2025

Abstract

The present document describes an error amplification circuit for a voltage regulator. The error amplification circuit comprises a differential error amplifier having a first input for a feedback signal of the voltage regulator and having a second input for a reference signal, wherein the differential error amplifier is configured to provide an amplifier output current in dependence of the signals at the first input and at the second input. Furthermore the error amplification circuit comprises a current sensing unit configured to sense the amplifier output current to provide a sensed current, a processing unit configured to process the sensed current to provide a processed current, and an adjustment resistor which is arranged in series with the second input of the differential error amplifier and to which the processed current is applied.

First claim

What is claimed is:

1. An error amplification circuit for a voltage regulator; wherein the error amplification circuit comprises
a differential error amplifier having a first input for a feedback signal of the voltage regulator and having a second input for a reference signal; wherein the differential error amplifier is configured to provide an amplifier output current in dependence of the signals at the first input and at the second input;
a current sensing unit configured to sense the amplifier output current to provide a sensed current;
a processing unit configured to process the sensed current to provide a processed current;
an adjustment resistor which is arranged in series with the second input of the differential error amplifier and to which the processed current is applied; and wherein the first input is the inverting input of the differential error amplifier, and the second input is the non-inverting input of the differential error amplifier.

2. The error amplification circuit according to claim 1 , wherein
the differential error amplifier has a transconductance Gm=1/RA; and
the resistance value of the adjustment resistor is greater than 0 and smaller than RA.

3. The error amplification circuit according to claim 1 , wherein
the error amplification circuit comprises a reference node for applying a reference voltage;
the adjustment resistor is arranged between the reference node and the second input of the differential error amplifier; and
the processed current is applied to a feedback node between the adjustment resistor and the second input of the differential error amplifier.

4. The error amplification circuit according to claim 3 , wherein the error amplification circuit comprises a voltage buffer configured to provide the reference voltage at the reference node.

5. The error amplification circuit according to claim 1 , wherein the processing unit comprises a feedback filter unit configured to filter the sensed current or a signal derived from the sensed current, to provide the processed current.

6. The error amplification circuit according to claim 5 , wherein
the feedback filter unit is configured to provide a pole and/or a zero of the transfer function of the error amplification circuit; and/or
the feedback filter unit comprises a feedback capacitor and a feedback resistor.

7. The error amplification circuit according to claim 5 , wherein the processing unit comprises
a current-to-voltage conversion unit configured to convert the sensed current into a corresponding voltage which is filtered by the feedback filter unit to provide a processed voltage; and
a voltage-to-current conversion unit configured to convert the processed voltage Into the processed current.

8. The error amplification circuit according to claim 1 , wherein the error amplification circuit comprises
a transfer unit configured to transfer the amplifier output current as a transferred current to an output of the error amplification circuit; and
an output filter unit configured to filter the transferred current to provide an output voltage of the error amplification circuit.

9. The error amplification circuit according to claim 8 , wherein,
the output filter unit is configured to provide a pole of the transfer function of the error amplification circuit; and/or
the output filter unit comprises an output resistor and an output capacitor.

10. The error amplification circuit according to claim 8 , wherein the transfer unit and/or the current sensing unit comprise a current mirror.

11. The error amplification circuit according to claim 1 , wherein
the error amplification circuit comprises a feedback filter unit within the processing unit and an output filter unit at an output of the error amplification circuit;
the feedback filter unit comprises electronic components for setting a dominant pole and a dominant zero of the transfer function of the error amplification circuit; and
the output filter unit comprises electronic components for setting a non-dominant pole of the transfer function of the error amplification circuit, in particular for setting a non-dominant pole of the transfer function independently from the dominant pole and the dominant zero of the transfer function of the error amplification circuit.

12. The error amplification circuit according to claim 1 , wherein the differential error amplifier comprises an operational transconductance amplifier.

13. A regulator configured to regulate an output voltage of the regulator in dependence of a reference voltage; wherein the regulator comprises,
an output stage configured to provide the output voltage;
a voltage sensing unit configured to derive a feedback signal based on the output voltage;
an error amplification circuit according to claim 1 , wherein the feedback signal is applied to the first input of the differential error amplifier and wherein the reference voltage is provided to the second input of the differential error amplifier; and
wherein the first input is the inverting Input of the differential error amplifier and the second input is the non-inverting input of the differential error amplifier.

14. A method for providing an output current indicative of a deviation of a feedback signal from a reference signal; wherein the method comprises
applying the feedback signal to a first input of a differential error amplifier;
providing the reference signal to a second input of the differential error amplifier;
sensing an amplifier output current at an output of the differential error amplifier, to provide a sensed current;
processing the sensed current to provide a processed current;
feeding back the processed current to the second input of the differential error amplifier using an adjustment resistor which is arranged in series with the second input of the differential error amplifier; and
wherein the first input is the inverting input of the differential error amplifier, and the second input is the non-inverting input of the differential error amplifier.

Assignees

• Dialog Semiconductor Uk Ltd

Inventors

• Mercer Mark

Classifications

• G05F1/575 Primary

  characterised by the feedback circuit · CPC title

• H03F2200/171

  A filter circuit coupled to the output of an amplifier · CPC title

• H03F2200/462

  the current being sensed · CPC title

• H03F2203/45166

  Only one input of the dif amp being used for an input signal · CPC title

• H03F3/45197

  Pl types (H03F3/45224, H03F3/45251 take precedence) · CPC title