Display device and manufacturing method thereof

US12321069B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12321069-B2
Application numberUS-202418770947-A
CountryUS
Kind codeB2
Filing dateJul 12, 2024
Priority dateOct 1, 2012
Publication dateJun 3, 2025
Grant dateJun 3, 2025

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

In a display device having high reliability, even if being a narrow framing type, and a method for manufacturing thereof, having a display panel, being made up with a first substrate 101 and a second substrate 201, which are adhered with using a seal 301, a main SOC 302 is disposed like a wall, on a peripheral end portion of the first substrate 101 and the second substrate 201, and the seal 301 is disposed inwardly of the main SOC 302. Also, in a method for manufacturing thereof, the main SOC 302 is formed in a region including a cutting plane between the display panel regions neighboring with, and on the cutting plane is made the cutting thereof.

First claim

Opening claim text (preview).

What is claimed is: 1. A display device comprising: a first substrate includes a first edge; a first film on the first substrate; a second film on the first film; a first wiring provided between the first substrate and the first film; a second wiring provided between the first film and the second film; and a seal on the second film, wherein the second film is an organic film, including a first groove and a second groove, each of the first groove and the second groove overlaps the seal, each of the first wiring and the second wiring overlaps the seal, the second groove is located between the first groove and the first edge, the first groove is located between the first wiring and the second groove, and the first wiring is located between the second wiring and the first groove. 2. The display device of claim 1 , further comprising: a second substrate, and wherein the seal is provided between the second film and the second substrate. 3. The display device of claim 2 , further comprising: a first spacer in the seal, wherein the first spacer overlaps the first wiring and does not overlap the second wiring. 4. The display device of claim 1 , further comprising: a first alignment film on the second film, wherein the first alignment film overlaps the seal, and each of the first groove and the second groove is covered by the first alignment film. 5. The display device of claim 4 , wherein the first alignment film overlaps the first edge of the first substrate. 6. The display device of claim 1 , wherein the second film further includes a third groove, the third groove overlaps the seal, and the third groove overlaps the first wiring and does not overlap the second wiring.

Assignees

Inventors

Classifications

  • Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers · CPC title

  • Manufacturing of individual cells out of a plurality of cells, e.g. by dicing · CPC title

  • spacers regularly patterned on the cell subtrate, e.g. walls, pillars (G02F1/133377 takes precedence) · CPC title

  • by etching · CPC title

  • Spacers having different sizes · CPC title

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Frequently asked questions

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What does patent US12321069B2 cover?
In a display device having high reliability, even if being a narrow framing type, and a method for manufacturing thereof, having a display panel, being made up with a first substrate 101 and a second substrate 201, which are adhered with using a seal 301, a main SOC 302 is disposed like a wall, on a peripheral end portion of the first substrate 101 and the second substrate 201, and the seal 301…
Who is the assignee on this patent?
Japan Display Inc
What technology area does this patent fall under?
Primary CPC classification G02F1/1339. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 03 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).