Display substrate and manufacturing method therefor, and display apparatus

US12317718B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12317718-B2
Application numberUS-202117778891-A
CountryUS
Kind codeB2
Filing dateMar 5, 2021
Priority dateMar 5, 2020
Publication dateMay 27, 2025
Grant dateMay 27, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display substrate has a display region. The display region includes at least a first region, and the first region includes a plurality of first sub-pixel regions. The display substrate includes: a substrate; a plurality of first sub-pixels disposed on a side of the substrate; and a pattern layer disposed on a side of the plurality of first sub-pixels away from the substrate. The pattern layer includes a first pattern and a plurality of second patterns. Boundaries of orthographic projections of part of the second patterns located in the first region on the substrate respectively coincide with boundaries of the first sub-pixel regions; or boundaries of the first sub-pixel regions are respectively located within boundaries of orthographic projections of part of the second patterns located in the first region on the substrate. A portion of the first pattern located in the first region is electrically connected to the first cathode.

First claim

Opening claim text (preview).

What is claimed is: 1. A display substrate having a display region, wherein the display region includes at least a first region, and the first region includes a plurality of first sub-pixel regions; the display substrate comprises: a substrate; a plurality of first sub-pixels disposed on a side of the substrate and respectively located at the plurality of first sub-pixel regions; each first sub-pixel including a first anode, a first light-emitting layer and a first cathode that are stacked in sequence; and a pattern layer disposed on a side of the plurality of first sub-pixels away from the substrate; wherein the pattern layer includes a first pattern and a plurality of second patterns, the first pattern has a plurality of openings arranged at intervals, and the plurality of second patterns are disposed in the plurality of openings, respectively; the first pattern is made of a conductive material, and the second patterns are made of a transparent insulating material; wherein boundaries of orthographic projections of part of the plurality of second patterns located in the first region on the substrate respectively coincide with boundaries of the plurality of first sub-pixel regions; or boundaries of the plurality of first sub-pixel regions are respectively located within boundaries of orthographic projections of part of the plurality of second patterns located in the first region on the substrate; a portion of the first pattern located in the first region is electrically connected to the first cathode; and the second patterns are made of a lithium quinoline complex, and the first pattern is made of magnesium. 2. The display substrate according to claim 1 , wherein an orthographic projection of each second pattern on the substrate is at least partially overlapped with an orthogonal projection of a corresponding opening on the substrate. 3. The display substrate according to claim 2 , wherein the display region further includes a second region located beside the first region, and the second region includes a plurality of second sub-pixel regions; and a portion of the display substrate located between two adjacent second sub-pixel regions is configured to allow light to pass through the display substrate from a side to another opposite side. 4. The display substrate according to claim 1 , wherein the first pattern and the second patterns are mutually exclusive in material. 5. The display substrate according to claim 4 , wherein the display region further includes a second region located beside the first region, and the second region includes a plurality of second sub-pixel regions; and a portion of the display substrate located between two adjacent second sub-pixel regions is configured to allow light to pass through the display substrate from a side to another opposite side. 6. The display substrate according to claim 1 , wherein a side surface of the portion, proximate to the substrate, of the first pattern located in the first region is in direct contact with a side surface of the first cathode away from the substrate. 7. The display substrate according to claim 6 , wherein the display region further includes a second region located beside the first region, and the second region includes a plurality of second sub-pixel regions; and a portion of the display substrate located between two adjacent second sub-pixel regions is configured to allow light to pass through the display substrate from a side to another opposite side. 8. The display substrate according to claim 1 , wherein a thickness of the portion of the first pattern located in the first region is greater than or equal to 100 nm. 9. The display substrate according to claim 1 , wherein with respect to the substrate, side surfaces of the plurality of second patterns away from the substrate are lower than a side surface of the first pattern away from the substrate. 10. The display substrate according to claim 9 , wherein the display region further includes a second region located beside the first region, and the second region includes a plurality of second sub-pixel regions; and a portion of the display substrate located between two adjacent second sub-pixel regions is configured to allow light to pass through the display substrate from a side to another opposite side. 11. The display substrate according to claim 1 , wherein a thickness of the plurality of second patterns is about 5 nm. 12. The display substrate according to claim 1 , wherein the display region further includes a second region located beside the first region, and the second region includes a plurality of second sub-pixel regions; and a portion of the display substrate located between two adjacent second sub-pixel regions is configured to allow light to pass through the display substrate from a side to another opposite side. 13. A display apparatus comprising the display substrate according to claim 1 . 14. The display apparatus according to claim 13 , wherein the display region of the display substrate further includes a second region; and the display apparatus further includes at least one optical sensor disposed on a side of the substrate in the display substrate away from the pattern layer in the display substrate and located in the second region. 15. A manufacturing method of a display substrate, comprising: providing a substrate, wherein the substrate has a display region, the display region includes at least a first region, and the first region includes a plurality of first sub-pixel regions; forming a plurality of first sub-pixels on a side of the substrate, wherein the plurality of first sub-pixels are respectively located at the plurality of first sub-pixel regions, and each first sub-pixel includes a first anode, a first light-emitting layer and a first cathode that are stacked in sequence; and forming a pattern layer on a side of the plurality of first sub-pixels away from the substrate, wherein the pattern layer includes a first pattern and a plurality of second patterns, the first pattern has a plurality of openings arranged at intervals, and the plurality of second patterns are disposed in the plurality of openings, respectively; the first pattern is made of a conductive material, and the second patterns are made of a transparent insulating material; wherein forming the pattern layer on the side of the plurality of first sub-pixels away from the substrate, includes: forming the plurality of second patterns arranged at intervals on the side of the plurality of first sub-pixels away from the substrate, wherein boundaries of orthographic projections of part of the plurality of second patterns located in the first region on the substrate respectively coincide with boundaries of the plurality of first sub-pixel regions; or boundaries of the plurality of first sub-pixel regions are respectively located within boundaries of orthographic projections of part of the plurality of second patterns located in the first region on the substrate; and forming the first pattern in gaps between the plurality of second patterns, wherein a portion of the first pattern located in the first region is electrically connected to the first cathode; wherein forming the plurality of second patterns arranged at intervals on the side of the plurality of first sub-pixels away from the substrate, includes: disposing a fine metal mask on the side of the plurality of first sub-pixels away from the substrate; and evaporating the transparent insulating material onto the side of the plurality of first sub-pixels away from the substrate by an evaporation process using the fine metal mask, so as to form the p

Assignees

Inventors

Classifications

  • combined with auxiliary electrodes · CPC title

  • characterised by the geometry or disposition of pixel elements · CPC title

  • Pixel-defining structures or layers, e.g. banks · CPC title

  • Arrangements for extracting light from the devices · CPC title

  • Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title

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What does patent US12317718B2 cover?
A display substrate has a display region. The display region includes at least a first region, and the first region includes a plurality of first sub-pixel regions. The display substrate includes: a substrate; a plurality of first sub-pixels disposed on a side of the substrate; and a pattern layer disposed on a side of the plurality of first sub-pixels away from the substrate. The pattern layer…
Who is the assignee on this patent?
Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/353. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 27 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).