Analog amplitude pre-distortion circuit and method

Patent metadata

Field	Value
Publication number	US-12316283-B2
Application number	US-202318348415-A
Country	US
Kind code	B2
Filing date	Jul 7, 2023
Priority date	Jul 13, 2022
Publication date	May 27, 2025
Grant date	May 27, 2025

Abstract

An analog amplitude pre-distortion circuit includes a Radio Frequency, RF, input for receiving an RF signal. The circuit also includes an amplifier stage comprising an amplifier stage input for receiving the RF signal from the RF input, where the amplifier stage is operable to amplify the RF signal to produce an amplified RF signal. The circuit further includes a bias circuit. The bias circuit includes a detector stage for detecting an amplitude of the RF signal, and for producing a correction signal based on the amplitude of the RF signal. The bias circuit also includes a bias application stage coupled to the amplifier stage input.

First claim

The invention claimed is:

1. An analog amplitude pre-distortion circuit comprising:
a Radio Frequency, RF, input for receiving an RF signal;
an amplifier stage comprising an amplifier stage input coupled to the RF input for receiving the RF signal, wherein the amplifier stage is operable to amplify the RF signal to produce an amplified RF signal; and
a bias circuit including
a transistor having a first current terminal, a second current terminal and a control terminal, wherein the first current terminal is coupled to the amplifier stage input and wherein the second current terminal is coupled to a reference potential,
a resistor coupled between the amplifier stage input and the control terminal of the transistor,
a variable reactance component comprising a variable capacitor coupled between the amplifier stage input and the control terminal of the transistor,
a controller for programmably controlling the variable reactance component to vary a capacitance of the variable reactance component, and
a capacitor coupled between the control terminal and the reference potential,

wherein the bias circuit is operable to
detect an amplitude of the RF signal,
apply a bias voltage at a first range of frequencies according to the amplitude of the RF signal at first impedances to the amplifier stage input, and
present second impedances at a second range of frequencies to the amplifier stage input,
wherein the first impedances are lower than the second impedances and wherein the first range of frequencies are lower than the second range of frequencies.

2. The circuit of claim 1 , further comprising an output for outputting an amplified RF signal from the amplifier stage.

3. The circuit of claim 1 , further comprising a current source coupled to the first current terminal.

4. The circuit of claim 1 , wherein the transistor is a bipolar transistor, wherein the first current terminal is a collector terminal of the bipolar transistor, wherein the second current terminal is an emitter terminal of the bipolar transistor, and wherein the control terminal is a base terminal of the bipolar transistor.

5. The circuit of claim 1 , wherein the amplifier stage input comprises a control terminal of a transistor.

6. The circuit of claim 1 , further comprising a DC-blocking capacitor coupled between the RF input and the amplifier stage input.

7. A power amplifier or a low noise amplifier comprising:
a Radio Frequency, RF, input for receiving an RF signal;
an amplifier stage comprising an amplifier stage input coupled to the RF input for receiving the RF signal, wherein the amplifier stage is operable to amplify the RF signal to produce an amplified RF signal; and
a bias circuit including
a transistor having a first current terminal, a second current terminal and a control terminal, wherein the first current terminal is coupled to the amplifier stage input and wherein the second current terminal is coupled to a reference potential,
a resistor coupled between the amplifier stage input and the control terminal of the transistor,
a variable reactance component comprising a variable capacitor coupled between the amplifier stage input and the control terminal of the transistor,
a controller for programmably controlling the variable reactance component to vary a capacitance of the variable reactance component, and
a capacitor coupled between the control terminal and the reference potential,

wherein the bias circuit is operable to
detect an amplitude of the RF signal,
apply a bias voltage at a first range of frequencies according to the amplitude of the RF signal at first impedances to the amplifier stage input, and
present second impedances at a second range of frequencies to the amplifier stage input,
wherein the first impedances are lower than the second impedances and wherein the first range of frequencies are lower than the second range of frequencies.

8. An analog amplitude pre-distortion method comprising:
receiving a Radio Frequency, RF, signal;
using an amplifier stage to amplify the RF signal to produce an amplified RF signal; and
applying bias voltages to an input of the amplifier stage by
detecting an amplitude of the RF signal,
applying a bias voltage at a first range of frequencies according to the amplitude of the RF signal at first impedances to the amplifier stage input, and
presenting second impedances at a second range of frequencies to the amplifier stage input,
wherein the first impedances are lower than the second impedances and wherein the first range of frequencies are lower than the second range of frequencies,

wherein a bias circuit is used to apply the bias voltages to the amplifier stage input, wherein the bias circuit includes
a transistor having a first current terminal, a second current terminal and a control terminal, wherein the first current terminal is coupled to an amplifier stage input of the amplifier stage and wherein the second current terminal is coupled to a reference potential,
a resistor and a variable reactance component comprising a variable capacitor coupled in parallel between the amplifier stage input and the control terminal of the transistor, and
a capacitor coupled between the control terminal and the reference potential,
and wherein the method further comprises programmably controlling the variable reactance component to vary a capacitance of the variable reactance component, to vary the bias voltages applied to the amplifier stage input.

9. The method of claim 8 , wherein the transistor is a bipolar transistor, wherein the first current terminal is a collector terminal of the bipolar transistor, wherein the second current terminal is an emitter terminal of the bipolar transistor, and wherein the control terminal is a base terminal of the bipolar transistor.

10. The method of claim 8 , wherein the amplifier stage input comprises a control terminal of a transistor.

Assignees

• Nxp Usa Inc

Inventors

• De Jong Gerben Willem
• Bergervoet Jozef Reinerus Maria
• Van Der Heijden Mark Pieter
• Elkassir Bilal

Classifications

• H03F1/302

  in bipolar transistor amplifiers (H03F1/303, H03F1/305, H03F1/307 take precedence) · CPC title

• H03F1/06

  to raise the efficiency of amplifying modulated radio frequency waves; to raise the efficiency of amplifiers acting also as modulators {(modulation H03C)} · CPC title

• H03F3/195

  in integrated circuits · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F2200/222

  A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier · CPC title