Display substrate and display apparatus

Patent metadata

Field	Value
Publication number	US-12315461-B2
Application number	US-202418597967-A
Country	US
Kind code	B2
Filing date	Mar 7, 2024
Priority date	Oct 15, 2021
Publication date	May 27, 2025
Grant date	May 27, 2025

Abstract

A display substrate includes a base substrate, multiple sub-pixels, multiple first gate drive circuits, and at least one auxiliary structure. The base substrate includes a display region and a peripheral region located at a periphery of the display region. The multiple sub-pixels are located in the display region. The multiple first gate drive circuits and the at least one auxiliary structure are located in the peripheral region. The multiple first gate drive circuits are configured to provide first gate drive signals to the multiple sub-pixels. One auxiliary structure is disposed between adjacent first gate drive circuits.

First claim

The invention claimed is:

1. A display substrate, comprising:
a base substrate, comprising a display region and a peripheral region located at a periphery of the display region;
a plurality of sub-pixels, located in the display region;
a plurality of first gate drive circuits and at least one auxiliary structure, which are located in the peripheral region; wherein
the plurality of first gate drive circuits are configured to provide a first gate drive signal for the plurality of sub-pixels;
the at least one auxiliary structure is disposed between adjacent first gate drive circuits;
the at least one auxiliary structure comprises: at least one first auxiliary structure and at least one second auxiliary structure;
a first auxiliary structure is located between a first gate drive circuit in n-th stage and a first gate drive circuit in (n−1)-th stage;
a second auxiliary structure is provided between a first gate drive circuit in (n−2)-th stage and the first gate drive circuit in the (n−1)-th stage;
the first gate drive circuit in the n-th stage is electrically connected to a first start signal line through the first auxiliary structure, where n is an integer; and
the first auxiliary structure is different from the second auxiliary structure;
wherein the first auxiliary structure comprises: a first auxiliary semiconductor block, a first connection electrode, and a second connection electrode; and
the first auxiliary semiconductor block is electrically connected to an output terminal of the first gate drive circuit in the n-th stage and the second connection electrode, the second connection electrode is electrically connected to the first connection electrode, and the first connection electrode is electrically connected to the first start signal line.

2. The display substrate according to claim 1 , wherein the second auxiliary structure comprises two second auxiliary semiconductor blocks, and orthographic projections of the two second auxiliary semiconductor blocks on the base substrate are rectangular.

3. The display substrate according to claim 2 , wherein the two second auxiliary semiconductor blocks are of an identical shape and are arranged along a second direction.

4. The display substrate according to claim 2 , wherein a length of the orthographic projection along a first direction is greater than a length of the orthographic projection along a second direction, and the plurality of first gate drive circuits are sequentially arranged along the second direction, wherein the first direction intersects the second direction; or, the two second auxiliary semiconductor blocks are formed into an integrated structure.

5. The display substrate according to claim 1 , wherein second auxiliary structure is not electrically connected to the light-emitting drive circuit and is filled between two adjacent cascaded light-emitting drive circuits.

6. The display substrate according to claim 5 , further comprising: at least one third auxiliary structure located on a side of two output transistors of at least one first gate drive circuit close to the first power supply line; and
the at least one third auxiliary structure includes at least one second auxiliary conductive block electrically connected to a first output terminal of the at least one first gate drive circuit.

7. The display substrate according to claim 1 , wherein the auxiliary structure is located between output transistors of the adjacent first gate drive circuits.

8. The display substrate according to claim 1 , wherein the first start signal line is located at a side of the plurality of first gate drive circuits close to the display region.

9. The display substrate according to claim 1 , wherein the first gate drive circuits are electrically connected to a first power supply line located at a side of the first gate drive circuits away from the display region and a second power supply line located at a side of the first gate drive circuits close to the display region, and the first start signal line is located at a side of the second power supply line close to the display region.

10. The display substrate according to claim 1 , wherein the second connection electrode and the first start signal line are in a same layer, and the first auxiliary semiconductor block and the first connection electrode are located at a side of the second connection electrode close to the base substrate.

11. The display substrate according to claim 1 , wherein the second auxiliary structure comprises at least one second auxiliary semiconductor block, and an inorganic composite insulation layer covering the second auxiliary semiconductor block is provided with at least one auxiliary via exposing a surface of the second auxiliary semiconductor block.

12. The display substrate according to claim 1 , wherein the at least one second auxiliary structure is electrically connected to a second power supply line; wherein
the at least one second auxiliary structure comprises: at least one third auxiliary semiconductor block, and the at least one third auxiliary semiconductor block is electrically connected to the second power supply line; or
the at least one second auxiliary structure comprises: at least one first auxiliary conductive block, and the at least one first auxiliary conductive block is electrically connected to the second power supply line.

13. The display substrate according to claim 1 , wherein the at least one second auxiliary structure is electrically connected to a first start signal line;
wherein the at least one second auxiliary structure comprises: a fourth auxiliary semiconductor block, a fifth connection electrode, and a sixth connection electrode; and
the fourth auxiliary semiconductor block is electrically connected to the fifth connection electrode, the fifth connection electrode is electrically connected to the sixth connection electrode, and the sixth connection electrode is electrically connected to the first start signal line.

14. The display substrate according to claim 1 , wherein the plurality of first gate drive circuits are divided into two groups with each group comprising a plurality of cascaded first gate drive circuits; a first group of first gate drive circuits comprises first gate drive circuits from a first stage to the (n−1)-th stage, and the second group of first gate drive circuits comprises first gate drive circuits from the n-th stage to k-th stage;
in the first group of first gate drive circuits, a first input terminal of the first gate drive circuit in the first stage is electrically connected to a second start signal line, a first output terminal of the first gate drive circuit in the k-th stage is electrically connected to a first input terminal of a first gate drive circuit in (k+1)-th stage, where k is an integer greater than 0 and less than (n−1), and K is an integer greater than n.

15. The display substrate according to claim 1 , wherein the base substrate further comprises a bonding region located at a side of the display region;
in the peripheral region, a first gate drive circuit in i-th stage is located at a side of a first gate drive circuit in (i−1)-th stage away from the bonding region, where i is an integer.

16. The display substrate according to claim 15 , wherein the first gate drive circuit at least comprises an input transistor, an output transistor, and a plurality of storage capacitors, the input transistor is located at a side of the output transistor away from the display region and at a side of the plurality of storage capacitors close to the bonding region.

17. The display substrate a

Assignees

• Chengdu Boe Optoelect Tech Co
• Boe Technology Group Co Ltd

Inventors

• Bai Lu
• Zhou Yang
• Qu Yi
• Luo Chang
• Yang Huijuan
• Zhang Yi
• Dai Junxiu

Classifications

• H10K59/131

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10K59/1213

  the pixel elements being TFTs · CPC title

• H10K59/1216

  the pixel elements being capacitors · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G11C19/28

  using semiconductor elements (G11C19/14, G11C19/36 take precedence) · CPC title