Recharge circuit for digital silicon photomultipliers

US12313458B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12313458-B2
Application numberUS-202418424419-A
CountryUS
Kind codeB2
Filing dateJan 26, 2024
Priority dateJul 19, 2019
Publication dateMay 27, 2025
Grant dateMay 27, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present application relates generally to silicon photomultiplier (SiPM) detector arrays. In one aspect, there is a system including an array of cells each including a single-photon avalanche diode (SPAD) reverse-biased above a breakdown voltage of the SPAD. Each cell may further include trigger logic connected to the SPAD, and configured to output a trigger signal indicating whether the SPAD is in breakdown. Each cell may still further include a conditional recharge circuit configured to recharge the SPAD conditional upon both (i) the recharge circuit applying the recharge signal to the cell and (ii) the trigger signal output by the trigger logic of the cell indicating the SPAD of the cell is in breakdown.

First claim

Opening claim text (preview).

The invention claimed is: 1. A system comprising: an array of cells, each cell in the array of cells comprising a single-photon avalanche diode (SPAD) reverse-biased above a breakdown voltage of the SPAD that triggers a trigger signal responsive to being in breakdown, the array of cells configured to be recharged by a recharge signal; and a circuitry configured to recharge the SPAD responsive to the trigger signal and the cell receiving the recharge signal; wherein the circuitry is configured to output the recharge signal gated by the trigger signal. 2. The system of claim 1 , further comprising a recharge circuit configured to apply the recharge signal to the array of cells. 3. The system of claim 1 , wherein each cell comprises trigger logic configured to output the trigger signal responsive to the SPAD being in breakdown. 4. The system of claim 1 , wherein the circuity is further configured to receive as input the recharge signal and the trigger signal. 5. The system of claim 1 , wherein the circuitry is implemented in each cell. 6. The system of claim 1 , wherein the system comprises an optical detector. 7. The system of claim 1 , wherein the system comprises a positron emission tomography (PET) system. 8. The system of claim 1 , wherein the system comprises a Light Detection and Ranging (LIDAR) system. 9. A system comprising: an array of cells, each cell in the array of cells comprising a single-photon avalanche diode (SPAD) reverse-biased above a breakdown voltage of the SPAD, wherein the array of cells is arranged in a plurality of rows of cells; a recharge circuitry comprising a recharge driver for each row of the plurality of rows of cells, wherein the recharge circuitry comprises a recharge transistor within each cell in the array of cells to control recharging of the SPAD; and wherein the recharge driver is configured to recharge the SPAD via the recharge transistor responsive to the SPAD being in breakdown, wherein the recharge driver is configured to output a recharge signal gated by a trigger signal triggered by the SPAD being in breakdown. 10. The system of claim 9 , wherein the recharge driver is located at a periphery of the array of cells. 11. The system of claim 9 , wherein the recharge driver is connected to each recharge transistor of all cells in a row of the plurality of rows. 12. The system of claim 9 , wherein the recharge driver is further configured to output the recharge signal to each recharge transistor of all cells in a row of the plurality of rows. 13. The system of claim 12 , further comprising a controller configured to detect an occurrence of the SPAD being in breakdown in any cell in a row of the plurality of rows. 14. The system of claim 13 , wherein the controller is further configured to control, responsive to the detection, the recharge driver to output the recharge signal. 15. The system of claim 9 , further comprising an additional circuitry coupled with the recharge transistor to form a conditional recharge circuit. 16. The system of claim 15 , wherein the conditional recharge circuit is further configured to recharge the SPAD upon the recharge circuit applying the recharge signal to a rows of cells and a cell in the rows of cells indicating the SPAD of the cell is in breakdown. 17. A method comprising: triggering, by trigger logic for a row of cells of an array of cells, a trigger signal indicating a single-photon avalanche diode (SPAD) reverse-biased of a cell in the row of cells is above a breakdown voltage of the SPAD; detecting, by a controller, the trigger signal; and outputting, by a recharge circuitry responsive to the controller, a recharge signal to a recharge transistor in each cell in the row of cells, wherein the recharge signal gated is by the trigger signal. 18. The method of claim 17 , wherein the recharge circuitry comprises a recharge driver to output the recharge signal for the row of cells. 19. The method of claim 17 , wherein the recharge circuitry comprises the recharge transistor to control recharging of the SPAD.

Assignees

Inventors

Classifications

  • Silicon photomultipliers [SiPM], e.g. an avalanche photodiode [APD] array on a common Si substrate · CPC title

  • Avalanche · CPC title

  • Single-photon detection or photon counting · CPC title

  • Emission tomography · CPC title

  • G01J1/44Primary

    Electric circuits {(for command of an exposure part G03B7/02)} · CPC title

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What does patent US12313458B2 cover?
The present application relates generally to silicon photomultiplier (SiPM) detector arrays. In one aspect, there is a system including an array of cells each including a single-photon avalanche diode (SPAD) reverse-biased above a breakdown voltage of the SPAD. Each cell may further include trigger logic connected to the SPAD, and configured to output a trigger signal indicating whether the SPA…
Who is the assignee on this patent?
Avago Tech Int Sales Pte Lid
What technology area does this patent fall under?
Primary CPC classification G01J1/44. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 27 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).