Event-based computational pixel imagers

Patent metadata

Field	Value
Publication number	US-12302006-B2
Application number	US-202217945406-A
Country	US
Kind code	B2
Filing date	Sep 15, 2022
Priority date	Feb 4, 2019
Publication date	May 13, 2025
Grant date	May 13, 2025

Abstract

A computational pixel imaging device that includes an array of pixel integrated circuits for event-based detection and imaging. Each pixel may include a digital counter that accumulates a digital number, which indicates whether a change is detected by the pixel. The counter may count in one direction for a portion of an exposure and count in an opposite direction for another portion of the exposure. The imaging device may be configured to collect and transmit key frames at a lower rate, and collect and transmit delta or event frames at a higher rate. The key frames may include a full image of a scene, captured by the pixel array. The delta frames may include sparse data, captured by pixels that have detected meaningful changes in received light intensity. High speed, low transmission bandwidth motion image video can be reconstructed using the key frames and the delta frames.

First claim

The invention claimed is:

1. A computational pixel imaging apparatus, comprising:
a plurality of pixels, each pixel comprising a detector configured to generate an analog signal when exposed to radiation and a pixel integrated circuit configured to convert the analog signal into at least one digital signal with at least one counter, wherein the pixel integrated circuit comprises a signal converter configured to convert the analog signal to a sequence of pulses, and a first counter configured to, in response to the sequence of pluses, accumulate a first digital number, and wherein the plurality of pixels are configured to:
acquire a plurality of key frames at a first frequency in response to exposure of the detectors of the plurality of pixels for a first-type exposure, wherein when acquiring a key frame of the plurality of key frames, the first counter increments the first digital number for the first-type exposure; and
acquire a plurality of delta frames at a second frequency in response to exposure of the detectors of the plurality of pixels for a second-type exposure, wherein when acquiring a delta frame of the plurality of delta frames, the first counter increments the first digital number for a first portion of the second-type exposure and decrements the first digital number for a second portion of the second-type exposure, and wherein the second frequency is higher than the first frequency.

2. The computational pixel imaging apparatus of claim 1 , wherein the plurality of delta frames comprise data from only pixels of the plurality of pixels that have detected event-base changes in the radiation received during the second-type exposure.

3. The computational pixel imaging apparatus of claim 1 , further comprising:
read-out circuitry configured to transmit the plurality of key frames at the first frequency and the plurality of delta frames at the second frequency for reconstructing a video.

4. The computational pixel imaging apparatus of claim 1 , wherein the second frequency is a multiple of the first frequency.

5. The computational pixel imaging apparatus of claim 1 , wherein the second-type exposure is of the same duration.

6. The computational pixel imaging apparatus of claim 1 , wherein the pixel integrated circuit further comprises a second counter configured to collect at least a portion of the plurality of the delta frames and when collecting the at least a portion of the plurality of the delta frames, the second counter, in response to the sequence of pluses, increments a second digital number for a first portion of the second-type exposure and decrements the second digital number for a second portion of the second-type exposure.

7. The computational pixel imaging apparatus of claim 6 , wherein the first counter and the second counter are configured to operate simultaneously.

8. The computational pixel imaging apparatus of claim 7 , wherein: the second counter collects a first portion of the plurality of delta frames, the first counter collects a second portion of the plurality of delta frames, and when collecting the second portion of the plurality of delta frames, the first counter increments the first digital number for a first portion of the second-type exposure and decrements the first digital number for a second portion of the second-type exposure.

9. The computational pixel imaging apparatus of claim 1 , wherein the plurality of the delta frames are phase aligned with the plurality of key frames such that motion artifacts in resulting reconstructed images from the plurality of key frames and plurality of delta frames are reduced.

10. A computational pixel imaging method, comprising:
acquiring, using a plurality of pixels, a plurality of key frames at a first frequency in response to exposure of detectors of the plurality of pixels for a first-type exposure, wherein each pixel comprises a detector configured to generate an analog signal when exposed to radiation and a pixel integrated circuit configured to convert the analog signal into at least one digital signal with at least one counter, wherein the pixel integrated circuit comprises a signal converter configured to convert the analog signal to a sequence of pulses, and a first counter configured to, in response to the sequence of pluses, accumulate a first digital number, wherein when acquiring a key frame of the plurality of key frames, the first counter increments the first digital number for the first-type exposure; and
acquiring, using the plurality of pixels, a plurality of delta frames at a second frequency in response to exposure of the detectors of the plurality of pixels for a second-type exposure, wherein when acquiring a delta frame of the plurality of delta frames, the first counter increments the first digital number for a first portion of the second-type exposure and decrements the first digital number for a second portion of the second-type exposure, and wherein the second frequency is higher than the first frequency.

11. The computational pixel imaging method of claim 10 , wherein the plurality of delta frames comprise data from only pixels of the plurality of pixels that have detected event-base changes in the radiation received during the second-type exposure.

12. The computational pixel imaging method of claim 10 , further comprising:
transmitting, using read-out circuitry, the plurality of key frames at the first frequency and the plurality of delta frames at the second frequency for reconstructing a video.

13. The computational pixel imaging method of claim 10 , wherein the second frequency is a multiple of the first frequency.

14. The computational pixel imaging method of claim 10 , wherein the second-type exposure is of the same duration.

Assignees

• Anduril Industries Inc

Inventors

• Kelly Michael W
• Colonero Curtis
• David Christopher
• Baker Justin
• Ross William

Classifications

• H04N23/11

  for generating image signals from visible and infrared light wavelengths · CPC title

• H04N25/75

  Circuitry for providing, modifying or processing image signals from the pixel array · CPC title

• H04N23/20

  for generating image signals from infrared radiation only · CPC title

• H10F39/197

  Bipolar transistor image sensors · CPC title

• H04N25/772

  comprising A/D, V/T, V/F, I/T or I/F converters · CPC title