Resource efficient list decoding operations

Patent metadata

Field	Value
Publication number	US-12301256-B2
Application number	US-202318234824-A
Country	US
Kind code	B2
Filing date	Aug 16, 2023
Priority date	Aug 16, 2023
Publication date	May 13, 2025
Grant date	May 13, 2025

Abstract

Certain aspects of the present disclosure provide techniques for Aspects of the present disclosure relate to wireless communications, and more particularly, to techniques for determining a minimal list size to use in list decoding operations for reducing resource consumption (e.g., compute, memory, and power) at a decoder. A method includes receiving a codeword comprising a plurality of channel bits encoded with an error-correcting code, the plurality of channel bits comprising, at least, a plurality of information bits, determining a payload size of the codeword, determining a channel capacity metric for the plurality of channel bits, determining a minimal list size for a list decoding operation based on at least the payload size and the channel capacity metric; and performing the list decoding operation on the codeword based on the minimal list size to obtain the plurality of information bits.

First claim

What is claimed is:

1. An apparatus configured for wireless communications, comprising:
one or more memories comprising processor-executable instructions; and
one or more processors configured to execute the processor-executable instructions and cause the apparatus to:
receive a codeword comprising a plurality of channel bits encoded with an error-correcting code, the plurality of channel bits comprising, at least, a plurality of information bits;
determine a payload size of the codeword;
determine a channel capacity metric for the plurality of channel bits;
determine a minimal list size for a list decoding operation based on at least the payload size and the channel capacity metric; and
perform the list decoding operation on the codeword based on the minimal list size to obtain the plurality of information bits.

2. The apparatus of claim 1 , wherein to determine the minimal list size for the list decoding operation based on at least the payload size and the channel capacity metric, the one or more processors are configured to execute the processor-executable instructions and cause the apparatus to:
determine a plurality of candidate list sizes for the list decoding operation;
for the determined payload size, determine a range of channel capacity metrics associated with each of the plurality of candidate list sizes, wherein the range of channel capacity metrics associated with each of the plurality of candidate list sizes do not overlap; and
identify a candidate list size, from the plurality of candidate list sizes, as the minimal list size based on the channel capacity metric determined for the plurality of channel bits that fall within the range of channel capacity metrics associated with the candidate list size.

3. The apparatus of claim 2 , wherein the one or more processors are configured to execute the processor-executable instructions and cause the apparatus to receive the plurality of channel bits over a plurality of symbols.

4. The apparatus of claim 3 , wherein to determine the channel capacity metric for the plurality of channel bits, the one or more processors are configured to execute the processor-executable instructions and cause the apparatus to:
for each respective symbol of the plurality of symbols, calculate a log-likelihood ratio for one or more bits of the plurality of channel bits transmitted in the respective symbol;
for each respective bit of the plurality of channel bits, calculate a channel capacity per bit value for the respective bit based on the log-likelihood ratio calculated for the symbol associated with the respective bit; and
sum the channel capacity per bit value calculated for each bit of the plurality of channel bits to determine the channel capacity metric.

5. The apparatus of claim 1 , wherein the channel capacity metric comprises a mutual information value.

6. The apparatus of claim 1 , wherein the error-correcting code comprises a polar code.

7. The apparatus of claim 1 , wherein the error-correcting code comprises a viterbi code.

8. The apparatus of claim 1 , wherein to perform the list decoding operation based on the minimal list size, the one or more processors are configured to execute the processor-executable instructions and cause the apparatus to select a number of decoding paths equal to the minimal list size.

9. A method for wireless communications by an apparatus, comprising:
receiving a codeword comprising a plurality of channel bits encoded with an error-correcting code, the plurality of channel bits comprising, at least, a plurality of information bits;
determining a payload size of the codeword;
determining a channel capacity metric for the plurality of channel bits;
determining a minimal list size for a list decoding operation based on at least the payload size and the channel capacity metric; and
performing the list decoding operation on the codeword based on the minimal list size to obtain the plurality of information bits.

10. The method of claim 9 , wherein determining the minimal list size for the list decoding operation based on at least the payload size and the channel capacity metric comprises:
determining a plurality of candidate list sizes for the list decoding operation;
for the determined payload size, determining a range of channel capacity metrics associated with each of the plurality of candidate list sizes, wherein the range of channel capacity metrics associated with each of the plurality of candidate list sizes do not overlap; and
identifying a candidate list size, from the plurality of candidate list sizes, as the minimal list size based on the channel capacity metric determined for the plurality of channel bits that fall within the range of channel capacity metrics associated with the candidate list size.

11. The method of claim 10 , further comprising receiving the plurality of channel bits over a plurality of symbols.

12. The method of claim 11 , wherein determining the channel capacity metric for the plurality of channel bits comprises:
for each respective symbol of the plurality of symbols, calculating a log-likelihood ratio for one or more bits of the plurality of channel bits transmitted in the respective symbol;
for each respective bit of the plurality of channel bits, calculating a channel capacity per bit value for the respective bit based on the log-likelihood ratio calculated for the symbol associated with the respective bit; and
summing the channel capacity per bit value calculated for each bit of the plurality of channel bits to determine the channel capacity metric.

13. The method of claim 9 , wherein the channel capacity metric comprises a mutual information value.

14. The method of claim 9 , wherein the error-correcting code comprises a polar code.

15. The method of claim 9 , wherein the error-correcting code comprises a viterbi code.

16. The method of claim 9 , wherein performing the list decoding operation based on the minimal list size comprises selecting a number of decoding paths equal to the minimal list size.

17. One or more non-transitory computer-readable media comprising executable instructions that, when executed by one or more processors of an apparatus, cause the apparatus to perform operations comprising:
receiving a codeword comprising a plurality of channel bits encoded with an error-correcting code, the plurality of channel bits comprising, at least, a plurality of information bits;
determining a payload size of the codeword;
determining a channel capacity metric for the plurality of channel bits;
determining a minimal list size for a list decoding operation based on at least the payload size and the channel capacity metric; and
performing the list decoding operation on the codeword based on the minimal list size to obtain the plurality of information bits.

18. The one or more non-transitory computer-readable media of claim 17 , wherein determining the minimal list size for the list decoding operation based on at least the payload size and the channel capacity metric comprises:
determining a plurality of candidate list sizes for the list decoding operation;
for the determined payload size, determining a range of channel capacity metrics associated with each of the plurality of candidate list sizes, wherein the range of channel capacity metrics associated with each of the plurality of candidate list sizes do not overlap; and
identifying a candidate list size, from the plurality of candidate list sizes, as the minimal list size based on the channel capacity metric determined for the plurality of channel bits tha

Assignees

• Qualcomm Inc

Inventors

• Zagalsky Yevgeny
• Berger Peer
• Berliner Ran
• Landis Shay
• Yerushalmi Eitan
• Jacobian David

Classifications

• H03M13/4115

  list output Viterbi decoding · CPC title

• H03M13/1125

  using different domains for check node and bit node processing, wherein the different domains include probabilities, likelihood ratios, likelihood differences, log-likelihood ratios or log-likelihood difference pairs · CPC title

• H03M13/13

  Linear codes · CPC title

• H04L1/0057

  Block codes (H04L1/0061, H04L1/0064 take precedence) · CPC title

• H03M13/1555 Primary

  Pipelined decoder implementations · CPC title