Atomic Layer-Based Surface Treatments for Infrared Detectors
US-2023129191-A1 · Apr 27, 2023 · US
US12300712B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12300712-B2 |
| Application number | US-202217938838-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 7, 2022 |
| Priority date | Oct 7, 2021 |
| Publication date | May 13, 2025 |
| Grant date | May 13, 2025 |
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Disclosed herein is an infrared detector. The detector includes a plurality of pixels. Each pixel includes an n-type semiconductor top contact layer, a p-type semiconductor layer electrically connected to the n-type top contact layer to form a top p-n junction, a unipolar electron barrier electrically connected to the p-type semiconductor layer, a bottom absorber, and an n-type semiconductor bottom contact layer electrically connected to the bottom absorber. The unipolar electron barrier is positioned between the p-type semiconductor layer and the bottom absorber.
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What is claimed is: 1. An infrared detector array comprising: a plurality of pixels, wherein each pixel comprises: an n-type semiconductor top contact layer; a p-type semiconductor layer electrically connected to the n-type semiconductor top contact layer to form a top p-n junction; a unipolar electron barrier electrically connected to the p-type semiconductor layer; a bottom absorber, wherein the unipolar electron barrier is positioned between the p-type semiconductor layer and the bottom absorber; and an n-type semiconductor bottom contact layer electrically connected to the bottom absorber. 2. The infrared detector array of claim 1 , wherein the bottom absorber comprises a p-type semiconductor absorber layer. 3. The infrared detector array of claim 2 , wherein the bottom absorber further comprises a n-type semiconductor absorber layer which forms a p-n junction with the p-type semiconductor absorber layer. 4. The infrared detector array of claim 2 , further comprising a window layer which is positioned between the p-type semiconductor absorber layer and the n-type semiconductor bottom contact layer. 5. The infrared detector array of claim 4 , wherein the window layer comprising an n-type semiconductor window layer. 6. The infrared detector array of claim 5 , wherein the window layer further comprises a p-type semiconductor window layer which forms a p-n junction with the n-type semiconductor window layer. 7. The infrared detector array of claim 1 , wherein a first p-type transition layer is positioned between the p-type semiconductor layer and the unipolar electron barrier. 8. The infrared detector array of claim 7 , wherein a second p-type transition layer is positioned between the unipolar electron barrier and the bottom absorber. 9. The infrared detector array of claim 1 , wherein each n-type semiconductor top contact layer and p-type semiconductor layer are physically separated from each other. 10. The infrared detector array of claim 9 , wherein each unipolar electron barrier are physically separated from each other. 11. The infrared detector array of claim 10 , wherein each bottom absorber comprises a monolithic p-type absorber semiconductor layer. 12. The infrared detector array of claim 11 , wherein the monolithic p-type absorber semiconductor layer comprises a plurality of cavities which do not extend beyond the monolithic p-type absorber semiconductor layer. 13. The infrared detector array of claim 12 , wherein the plurality of cavities overlap with gaps between each n-type semiconductor top contact layer and p-type semiconductor layer. 14. The infrared detector array of claim 9 , wherein each unipolar electron barrier combined to form a monolithic layer. 15. The infrared detector array of claim 14 , wherein the monolithic layer comprises a plurality of cavities which do not extend beyond the monolithic layer. 16. The infrared detector array of claim 15 , wherein the plurality of cavities overlap gaps between each n-type semiconductor top contact layer and p-type semiconductor layer. 17. The infrared detector array of claim 1 , wherein the p-type semiconductor layer comprises a recombination layer and wherein the top p-n junction electrically isolates each pixel from adjacent pixels. 18. The infrared detector array of claim 17 , wherein the absorber layer has a bandgap which is narrower than the recombination layer. 19. The infrared detector array of claim 17 , wherein the recombination layer comprises a thickness of 1 micron or less. 20. A focal plane array comprising: the infrared detector array of claim 1 ; and a silicon readout integrated circuit electrically connected to the infrared detector array.
Multispectral infrared image sensors having a stacked structure, e.g. NPN, NPNPN or multiple quantum well [MQW] structures · CPC title
Electricity · mapped topic
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