Display panel

Patent metadata

Field	Value
Publication number	US-12300155-B2
Application number	US-202318330543-A
Country	US
Kind code	B2
Filing date	Jun 7, 2023
Priority date	Aug 22, 2022
Publication date	May 13, 2025
Grant date	May 13, 2025

Abstract

A display panel includes a base layer, a circuit layer disposed on the base layer and including a first driving circuit, a second driving circuit, and a plurality of pixel circuits, and a light emitting element layer disposed on the circuit layer and including a plurality of light emitting elements, each of the plurality of light emitting elements electrically connected to corresponding one of the plurality of pixel circuits. In a first direction, each of the first driving circuit and the second driving circuit is disposed between the plurality of pixel circuits.

First claim

What is claimed is:

1. A display panel comprising:
a base layer;
a circuit layer disposed on the base layer and including a first driving circuit, a second driving circuit, a third driving circuit, and a plurality of pixel circuits; and
a light emitting element layer disposed on the circuit layer and including a plurality of light emitting elements, each of the plurality of light emitting elements electrically connected to corresponding one of the plurality of pixel circuits,
wherein each of the first driving circuit, the second driving circuit, and the third driving circuit is disposed between the plurality of pixel circuits in a first direction,
at least one of the plurality of pixel circuits is connected to two adjacent light emitting elements of the plurality of light emitting elements,
one of the two adjacent light emitting elements overlaps one of the first driving circuit and the second driving circuit in a plan view, and the other one of the two adjacent light emitting elements overlaps the plurality of pixel circuits in a plan view.

2. The display panel of claim 1 , wherein
the circuit layer comprises:
an insulation layer;
a semiconductor pattern;
a conductive pattern; and
a signal line.

3. The display panel of claim 1 , wherein the plurality of light emitting elements include a first light emitting element group overlapping the first driving circuit and the second driving circuit in a plan view and a second light emitting element group overlapping the plurality of pixel circuits in a plan view.

4. The display panel of claim 3 , wherein each of the plurality of light emitting elements in the first light emitting element group is electrically connected to adjacent one of the plurality of pixel circuits through a connection line.

5. The display panel of claim 4 , wherein
each of the plurality of light emitting elements in the first light emitting element group comprises:
a first electrode disposed on the circuit layer;
a light emitting layer disposed on the first electrode; and
a second electrode disposed on the light emitting layer, and

the first electrode is electrically connected to the connection line.

6. The display panel of claim 1 , wherein each of the plurality of pixel circuits is electrically connected to the first driving circuit and the second driving circuit.

7. The display panel of claim 1 , wherein
the circuit layer further includes a third driving circuit spaced apart from the first driving circuit and the second driving circuit, and
the second driving circuit is interposed between the first driving circuit and the third driving circuit in the first direction.

8. The display panel of claim 7 , wherein each of the plurality of pixel circuits is electrically connected to the second driving circuit and a closer one of the first driving circuit and the third driving circuit.

9. The display panel of claim 7 , wherein
the plurality of light emitting elements include a first light emitting element group overlapping the first driving circuit, the second driving circuit, and the third driving circuit in a plan view and a second light emitting element group overlapping the plurality of pixel circuits in a plan view, and
each of the plurality of light emitting elements in the first light emitting element group is electrically connected to an adjacent one of the plurality of pixel circuits through a connection line.

10. The display panel of claim 7 , wherein the circuit layer further includes a fourth driving circuit disposed between the second driving circuit and the third driving circuit in the first direction.

11. The display panel of claim 10 , wherein each of the plurality of pixel circuits is electrically connected to closer one of the first driving circuit and the third driving circuit and to a closer one of the second driving circuit and the fourth driving circuit.

12. The display panel of claim 10 , wherein
the plurality of light emitting elements include a first light emitting element group overlapping the first driving circuit, the second driving circuit, the third driving circuit, and the fourth driving circuit in a plan view and a second light emitting element group overlapping the plurality of pixel circuits in a plan view, and
each of the plurality of light emitting elements in the first light emitting element group is electrically connected to an adjacent one of the plurality of pixel circuits through a connection line.

13. The display panel of claim 1 , wherein each of the first driving circuit and the second driving circuit extends in a second direction intersecting the first direction, the display panel further comprising a data driving circuit that extends in the second direction and is disposed below the first driving circuit and the second driving circuit.

14. An electronic device comprising:
a base layer including a display region and a non-display region disposed adjacent to the display region;
a circuit layer disposed on the base layer and including:
a first driving circuit disposed in the display region;
a second driving circuit spaced apart from the first driving circuit in a first direction; and
a plurality of pixel circuits; and

a light emitting element layer disposed on the circuit layer and including a plurality of light emitting elements disposed in the display region, each of the plurality of light emitting elements electrically connected to corresponding one of the plurality of pixel circuits,
wherein in the first direction, at least one of the plurality of pixel circuits is disposed between the first driving circuit and the second driving circuit,
at least one of the plurality of pixel circuits is connected to two adjacent light emitting elements of the plurality of light emitting elements,
one of the two adjacent light emitting elements overlaps one of the first driving circuit and the second driving circuit in a plan view, and the other one of the two adjacent light emitting elements overlaps the plurality of pixel circuits in a plan view.

15. The electronic device of claim 14 , wherein each of the plurality of pixel circuits is electrically connected to the first driving circuit and the second driving circuit.

16. The electronic device of claim 14 , wherein
the plurality of light emitting elements include a first light emitting element group overlapping the first driving circuit and the second driving circuit in a plan view and a second light emitting element group overlapping the plurality of pixel circuits in a plan view, and
each of the plurality of light emitting elements in the first light emitting element group is electrically connected to an adjacent one of the plurality of pixel circuits through a connection line.

17. The electronic device of claim 14 , wherein
the circuit layer further includes a third driving circuit spaced apart from the first driving circuit and the second driving circuit,
the second driving circuit is interposed between the first driving circuit and the third driving circuit in the first direction, and
each of the plurality of pixel circuits is electrically connected to the second driving circuit and a closer one of the first driving circuit and the third driving circuit.

18. The electronic device of claim 17 , wherein
the plurality of light emitting elements include a first light emitting element group overlapping the first driving circuit, the second driving circuit, and the third driving circuit in a plan view and a second light emitting element group overlapping the plurality of pixel circuits in a plan view, and
each o

Assignees

• Samsung Display Co Ltd

Inventors

• Kang Ki Nyeng
• Jin Guanghai
• Kim Sunkwang

Classifications

• G09G2310/0267

  Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• H10K59/35

  comprising red-green-blue [RGB] subpixels · CPC title

• H10K59/123

  Connection of the pixel electrodes to the thin film transistors [TFT] · CPC title

• H10K59/351

  comprising more than three subpixels, e.g. red-green-blue-white [RGBW] · CPC title