Peer-to-peer communications among communication fabric coupled endpoint devices

Patent metadata

Field	Value
Publication number	US-12298928-B2
Application number	US-202418435495-A
Country	US
Kind code	B2
Filing date	Feb 7, 2024
Priority date	Feb 5, 2019
Publication date	May 13, 2025
Grant date	May 13, 2025

Abstract

Computing architectures, platforms, and systems are provided herein. In one example, system is provided. The system includes a management processor configured to initiate a communication arrangement between a first endpoint device coupled to a communication fabric and a second endpoint device coupled to the communication fabric. The communication arrangement is configured to redirect a transfer from the first endpoint device based on an address corresponding to an address range of the second endpoint device without passing the transfer through a host processor coupled to the communication fabric that executes an application initiating the transfer.

First claim

What is claimed is:

1. A system comprising:
a user interface configured to receive instructions to initiate a communication arrangement between a first endpoint device coupled to a communication fabric and a second endpoint device coupled to the communication fabric;
wherein the communication arrangement is configured to redirect a transfer from the first endpoint device based on an address corresponding to an address range of the second endpoint device without passing the transfer through a host processor initiating the transfer as a direct memory access (DMA) transfer via a device driver for the first endpoint device using a destination address corresponding to the address range for the second endpoint device.

2. The system of claim 1 , wherein the communication arrangement is established in the communication fabric comprising one or more communication switch circuits.

3. The system of claim 1 , wherein the first endpoint device comprises a Graphics Processing Unit (GPU) and the second endpoint device comprises a data storage device or memory device.

4. The system of claim 1 , wherein the communication arrangement is further established to detect an additional transfer from the second endpoint device to one or more addresses corresponding to an address range for the first endpoint device, and redirect the additional transfer to the first endpoint device without passing the additional transfer through the host processor that initiates the additional transfer.

5. The system of claim 1 , wherein the address range of the second endpoint device is in addition to a memory mapped address range assigned to the second endpoint device within a memory space of the host processor during enumeration of the second endpoint device by the host processor.

6. The system of claim 1 , wherein the transfer is initiated by a request originated by the application executed by the host processor to transfer data from the first endpoint device to the second endpoint device via a command that employs the communication arrangement.

7. The system of claim 1 , wherein a management driver executed by the host processor interfaces with the device driver associated with the first endpoint device.

8. The system of claim 1 , wherein the communication arrangement redirects the transfer from the first endpoint device directed to the one or more addresses corresponding to the address range for the second endpoint device at least in part by translating the one or more addresses into endpoint device physical addresses of the second endpoint device.

9. A method comprising:
receiving, via a user interface, instructions initiating a communication arrangement between a first endpoint device coupled to a communication fabric and a second endpoint device coupled to the communication fabric;
wherein the communication arrangement is configured to redirect a transfer from the first endpoint device based on an address corresponding to an address range of the second endpoint device without passing the transfer through a host processor initiating the transfer as a direct memory access (DMA) transfer via a device driver for the first endpoint device using a destination address corresponding to the address range for the second endpoint device.

10. The method of claim 9 , wherein the communication arrangement is established in the communication fabric comprising one or more communication switch circuits.

11. The method of claim 9 , wherein the first endpoint device comprises a Graphics Processing Unit (GPU) and the second endpoint device comprises a data storage device or memory device.

12. The method of claim 9 , wherein at least one transfer is initiated by a request originated by the application executed by the host processor to transfer data from the first endpoint device to the second endpoint device via a command that employs the communication arrangement.

13. The method of claim 9 , wherein a management driver of the host processor interfaces with the device driver associated with the first endpoint device.

14. The method of claim 9 , wherein the communication arrangement redirects the transfer from the first endpoint device directed to the one or more addresses corresponding to the address range for the second endpoint device at least in part by translating the one or more addresses into endpoint device physical addresses of the second endpoint device.

15. An apparatus comprising:
one or more computer readable storage media;
program instructions stored on the one or more computer readable storage media, that when executed by a processor, direct the processor to at least:
receive, via a user interface, instructions to initiate a communication arrangement between a first endpoint device coupled to a communication fabric and a second endpoint device coupled to the communication fabric;
wherein the communication arrangement is configured to redirect a transfer from the first endpoint device based on an address corresponding to an address range of the second endpoint device without passing the transfer through a host processor initiating the transfer as a direct memory access (DMA) transfer via a device driver for the first endpoint device using a destination address corresponding to the address range for the second endpoint device.

16. The apparatus of claim 15 , wherein the communication arrangement is established over the communication fabric comprising one or more communication switch circuits.

17. The apparatus of claim 15 , wherein the address range of the second endpoint device is in addition to a memory mapped address range assigned to the second endpoint device within a memory space of the host processor during enumeration of the second endpoint device by the host processor.

18. The apparatus of claim 15 , wherein the transfer is initiated by a request originated by the application executed by the host processor to transfer data from the first endpoint device to the second endpoint device via a command that employs the communication arrangement.

19. The apparatus of claim 15 , wherein a management driver executed by the host processor interfaces with the device driver associated with the first endpoint device.

20. The apparatus of claim 15 , wherein the communication arrangement redirects the transfer from the first endpoint device directed to the one or more addresses corresponding to the address range for the second endpoint device at least in part by translating the one or more addresses into endpoint device physical addresses of the second endpoint device.

Assignees

• Liqid Inc

Inventors

• Cannata James Scott
• Long Christopher R
• Puri Sumit
• Schramm Bryan

Classifications

• G06F13/4022

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

• G06F13/4221

  being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus · CPC title

• G06F13/4234

  being a memory bus · CPC title

• G06F2213/0026

  PCI express · CPC title

• G06F13/28 Primary

  using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (G06F13/32 takes precedence) · CPC title