Display substrate and manufacturing method therefor, and display panel and display device

US12295234B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12295234-B2
Application numberUS-202117776817-A
CountryUS
Kind codeB2
Filing dateJan 5, 2021
Priority dateJan 6, 2020
Publication dateMay 6, 2025
Grant dateMay 6, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display substrate includes a base substrate, a pixel definition layer, an isolation layer, and an isolated layer. The pixel definition layer includes pixel openings penetrating through the pixel definition layer. The isolation layer is not overlapping with the pixel openings. The isolation layer includes a first isolation portion and a second isolation portion. A slope angle formed by at least one side edge and a bottom edge in a cross section of the second isolation portion is an obtuse angle. There is a gap between the first isolation portion and the second isolation portion at the obtuse angle. The isolated layer includes a first isolated portion covering the isolation layer, and a second isolated portion and a third isolated portion on both sides of the first isolation portion respectively. The thickness of the first isolation portion is larger than the thickness of the isolated layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A display substrate, comprising: a base substrate; a pixel definition layer, the pixel definition layer being located on a side of the base substrate and comprising: a plurality of pixel openings penetrating through the pixel definition layer; an isolation layer, the isolation layer being located on a side of the pixel definition layer away from the base substrate, not overlapping with each of the pixel openings, and the isolation layer comprising a first isolation portion and a second isolation portion located on a side of the first isolation portion away from the base substrate and covering the first isolation portion, wherein a slope angle formed by at least one side edge and a bottom edge in a cross section of the second isolation portion is an obtuse angle in a direction perpendicular to the base substrate, and there is a gap between the first isolation portion and the second isolation portion at the obtuse angle; an isolated layer, the isolated layer being located on a side of the isolation layer away from the pixel definition layer and the isolated layer comprising: a first isolated portion covering the isolation layer, and a second isolated portion and a third isolated portion on both sides of the first isolation portion respectively, wherein a thickness of the first isolation portion is larger than a thickness of the isolated layer. 2. The display substrate of claim 1 , wherein the isolated layer comprises: a cathode located in a display region of the base substrate and multiplexed as a self-capacitance electrode. 3. The display substrate of claim 2 , wherein the isolated layer further comprises: a white light emitting layer located between the cathode and the isolation layer. 4. The display substrate of claim 1 , wherein the isolated layer comprises: a first inorganic thin film encapsulation layer and a second inorganic thin film encapsulation layer located in a bezel region of the base substrate. 5. The display substrate of claim 2 , wherein the display region further comprises: a first inorganic thin film encapsulation layer, an organic thin film encapsulation layer and a second inorganic thin film encapsulation layer located on the cathode; the thickness of the first isolation portion is smaller than a thickness of the first inorganic thin film encapsulation layer in the direction perpendicular to the base substrate. 6. The display substrate of claim 1 , wherein a cross section of the second isolation portion is an inverted trapezoid structure and a cross section of the first isolation portion is a normal trapezoid structure or an inverted trapezoid structure in the direction perpendicular to the base substrate. 7. The display substrate of claim 6 , wherein the first isolation portion and the second isolation portion are a spacer layer with an integral structure. 8. The display substrate of claim 6 , wherein the first isolation portion is a metal layer or a metal oxide layer, and the second isolation portion is a spacer layer. 9. The display substrate of claim 1 , wherein cross sections of the first isolation portion and the second isolation portion are both parallelogram structures in the direction perpendicular to the base substrate. 10. The display substrate of claim 9 , wherein the first isolation portion and the second isolation portion are a spacer layer with an integral structure. 11. A manufacturing method for a display substrate, comprising: providing a base substrate; forming a pixel definition layer comprising a plurality of pixel openings penetrating through the pixel definition layer, an isolation layer and an isolated layer sequentially on the base substrate; wherein: the isolation layer does not overlap with each of the pixel openings, and the isolation layer comprises a first isolation portion and a second isolation portion located on a side of the first isolation portion away from the base substrate and covering the first isolation portion; a slope angle formed by at least one side edge and a bottom edge in a cross section of the second isolation portion is an obtuse angle in a direction perpendicular to the base substrate, there is a gap between the first isolation portion and the second isolation portion at the obtuse angle, and a thickness of the first isolation portion is larger than a thickness of the isolated layer; the isolated layer comprises: a first isolated portion covering the isolation layer, and a second isolated portion and a third isolated portion on both sides of the first isolation portion respectively. 12. The manufacturing method of claim 11 , wherein forming the isolation layer, comprises: forming a support layer on the pixel definition layer; forming the second isolation portion on the support layer, wherein a cross section of the second isolation portion is an inverted trapezoid structure in the direction perpendicular to the base substrate; etching the support layer by a wet etching process to form the first isolation portion covered by the second isolation portion; wherein a cross section of the first isolation portion is a normal trapezoid structure in the direction perpendicular to the base substrate, and there are gaps between two sides of the first isolation portion and the second isolation portion; constituting the isolation layer from the first isolation portion and the second isolation portion. 13. The manufacturing method of claim 11 , wherein forming the isolation layer, comprises: forming a support portion on the pixel definition layer, wherein a cross section of the support portion is a normal trapezoid structure in the direction perpendicular to the base substrate; forming the second isolation portion on the support portion; wherein a cross section of the second isolation portion is an inverted trapezoid structure in the direction perpendicular to the base substrate, and an upper edge of the support portion is greater than or equal to a bottom edge of the second isolation portion; etching the support portion by a wet etching process to form the first isolation portion covered by the second isolation portion; wherein a cross section of the first isolation portion is a normal trapezoid structure in the direction perpendicular to the base substrate, and there are gaps between two sides of the first isolation portion and the second isolation portion; constituting the isolation layer from the first isolation portion and the second isolation portion. 14. The manufacturing method of claim 11 , wherein forming the isolation layer, comprises: forming a pair of support portions on the pixel definition layer, wherein cross sections of the pair of support portions are two normal trapezoid structures with a gap in the direction perpendicular to the base substrate; forming the isolation layer on the pair of support portions, wherein the isolation layer comprises the first isolation portion filling the gap, and the second isolation portion covering the pair of support portions and the gap; cross sections of the first isolation portion and the second isolation portion are both inverted trapezoid structures in the direction perpendicular to the base substrate, and there are gaps between two sides of the first isolation portion and the second isolation portion; etching the pair of support portions by a wet etching process to remove a pattern of the pair of support portions. 15. The manufacturing method of claim 11 , wherein forming the isolation layer, comprises: forming a support portion on the pixel definition layer, wherein a cross section of the support portion is a normal trapezoid structure in the direction perpendicular

Assignees

Inventors

Classifications

  • multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers · CPC title

  • Manufacture or treatment · CPC title

  • Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title

  • H10K59/40Primary

    OLEDs integrated with touch screens · CPC title

  • by capacitive means · CPC title

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Frequently asked questions

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What does patent US12295234B2 cover?
A display substrate includes a base substrate, a pixel definition layer, an isolation layer, and an isolated layer. The pixel definition layer includes pixel openings penetrating through the pixel definition layer. The isolation layer is not overlapping with the pixel openings. The isolation layer includes a first isolation portion and a second isolation portion. A slope angle formed by at leas…
Who is the assignee on this patent?
Beijing Boe Display Tech Co, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/40. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 06 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).