Semiconductor integrated circuit device

Patent metadata

Field	Value
Publication number	US-12294355-B2
Application number	US-202117543587-A
Country	US
Kind code	B2
Filing date	Dec 6, 2021
Priority date	Dec 4, 2020
Publication date	May 6, 2025
Grant date	May 6, 2025

Abstract

A semiconductor integrate circuit device includes: an output transistor connected between a voltage input terminal to which a DC voltage is input and a voltage output terminal; a control circuit that controls on/off of the output transistor; a proportional current generation circuit capable of generating a current proportionally smaller than a current flowing through the output transistor; an overcurrent detection circuit capable of detecting an overcurrent state of an output current by determining whether a current flowing through the output transistor is equal to or greater than a first predetermined current value, based on the current generated by the proportional current generation circuit; and a retry circuit that generates and outputs a signal for intermittently turning off the output transistor in response to the overcurrent detection circuit detecting the overcurrent state.

First claim

What is claimed is:

1. A semiconductor integrated circuit device, comprising:
an output transistor connected between a voltage input terminal to which a DC voltage is input and a voltage output terminal;
a control circuit that controls on/off of the output transistor;
an overcurrent detection circuit configured to detect an overcurrent state of an output current by determining whether a current equal to or greater than a first predetermined current value flows through the output transistor, based on the current flowing through the output transistor;
a retry circuit that includes a timer circuit using charging and discharging by a capacitor and that generates and outputs a signal for intermittently turning off the output transistor in response to the overcurrent detection circuit detecting the overcurrent state continuously for a first period of time; and
a first external terminal,
wherein:
the timer circuit includes a constant current source, a current mirror circuit that copies a current from the constant current source, the capacitor that is charged and discharged by a current from the current mirror circuit and that is connected to the first external terminal as an external capacitor, and a comparator whose input is connected to the first external terminal,
the first period which is set by a capacitance value of the capacitor is longer than a period during which a rush current flows, the rush current flowing immediately after the output transistor is turned on,
the timer circuit starts measuring a time of the capacitor charged by the constant current source in response to the overcurrent state being detected, and, when the first period has elapsed, the output transistor changes from on to off, and when a second period has elapsed, the output transistor changes from off to on, and the control circuit repeats control of turning on and off the output transistor until the overcurrent state is resolved, and
the current mirror circuit turns off and on by output signal of the comparator.

2. The semiconductor integrated circuit device according to claim 1 , further comprising:
a second external terminal for receiving a predetermined signal; and
a logic circuit that receives the signal input to the first external terminal and the signal output by the timer circuit,
wherein the control circuit controls the output transistor, based on a signal output by the logic circuit.

3. The semiconductor integrated circuit device according to claim 1 , further comprising a current limit circuit that limits the output current of the output transistor such that the output current is not equal to or greater than a second predetermined current value,
wherein the second predetermined current value for the current limit circuit to be activated is greater than the first predetermined current value for the overcurrent detection circuit to detect the overcurrent state.

4. The semiconductor integrated circuit device according to claim 1 , further comprising a thermal shutdown circuit that generates and outputs a signal for turning off the output transistor in response to a chip temperature being equal to or higher than a predetermined temperature.

5. The semiconductor integrated circuit device according to claim 1 , further comprising a proportional current generation circuit configured to generate a current proportionally smaller than a current flowing though the output transistor,
wherein the overcurrent detection circuit detects the overcurrent state of the output current by determining whether the current flowing through the output transistor is equal to or greater than the first predetermined current value, based on the current generated by the proportional current generation circuit.

6. The semiconductor integrated circuit device according to claim 5 ,
wherein the semiconductor integrated circuit device is a high-side switch,
wherein the proportional current generation circuit includes:
a first transistor connected in parallel with the output transistor, a control terminal of the first transistor receiving a signal identical to a control signal applied to a control terminal of the output transistor;
a second transistor and a current-voltage converter connected between the voltage input terminal and a grounding point so as to be in series to the first transistor; and
a differential amplifier circuit that receives as inputs a potential at an output side of the output transistor and a potential at a connecting node between the first transistor and the second transistor, and

wherein an output of the differential amplifier circuit is applied to a control terminal of the second transistor, and a voltage converted from a current by the current-voltage converter is supplied to the overcurrent detection circuit.

7. The semiconductor integrated circuit device according to claim 6 , further comprising a third external terminal,
wherein the current-voltage converter includes an external resistor element connected to the third external terminal.

8. The semiconductor integrated circuit device according to claim 1 , wherein;
the timer circuit includes a third transistor connecting the current mirror circuit in series, and a current flowing through the third transistor, and
a ratio of the first time and the second time is based on the current source and the current from the third transistor.

9. The semiconductor integrated circuit device according to claim 8 , wherein:
the current mirror circuit includes a first current mirror and a second current mirror connected to the first current mirror, and
the first current mirror connecting to constant current source and the second current mirror connecting to the third transistor.

10. The semiconductor integrated circuit device according to claim 1 , wherein, a first time of the output transistor turning on is less than 50% of a second time of the output transistor turning off.

11. A semiconductor integrated circuit device, comprising:
an output transistor connected between a voltage input terminal to which a DC voltage is input and a voltage output terminal;
a control circuit that controls on/off of the output transistor;
a proportional current generation circuit configured to generate a current proportionally smaller than a current flowing through the output transistor;
an overcurrent detection circuit configured to detect an overcurrent state of an output current by determining whether a current flowing through the output transistor is equal to or greater than a first predetermined current value, based on the current generated by the proportional current generation circuit;
a retry circuit that generates and outputs a signal for intermittently turning off the output transistor in response to the overcurrent detection circuit detecting the overcurrent state;
a first external terminal for receiving a predetermined signal;
a logic circuit that receives the signal input to the first external terminal and the signal output by the retry circuit; and
a second external terminal,
wherein:
the control circuit controls the output transistor, based on the signal output by the retry circuit,
the control circuit controls the output transistor, further based on a signal output by the logic circuit,
the retry circuit includes a timer circuit,
the timer circuit includes, a constant current source, a current mirror circuit that copies a current from the constant current source, a capacitor that is charged and discharged by a current from the current mirror circuit, and a comparator whose input is connected to the second external terminal, wherein the timer circuit starts measuring a time of the capacitor charged by the constant current source in response to

Assignees

• Takano Yoichi
• Mitsumi Electric Co Ltd

Inventors

• Takano Yoichi

Classifications

• H10W42/80

  protecting against overcurrent or overload, e.g. fuses or shunts (integrated devices comprising arrangements for electrical protection H10D89/60) · CPC title

• H02H3/087

  for DC applications · CPC title

• G05F1/573 Primary

  with overcurrent detector · CPC title

• H03K2217/0027

  Measuring means of, e.g. currents through or voltages across the switch · CPC title

• H03K17/0822 Primary

  in field-effect transistor switches · CPC title