Array substrate and manufacturing method, display panel, and display device

Patent metadata

Field	Value
Publication number	US-12292638-B2
Application number	US-202118698378-A
Country	US
Kind code	B2
Filing date	Oct 15, 2021
Priority date	Oct 15, 2021
Publication date	May 6, 2025
Grant date	May 6, 2025

Abstract

An array substrate includes a base substrate, including a display area and a peripheral area; a driving circuit layer, located at one side of the base substrate and including a plurality of data lines and a plurality of scanning lines, where the plurality of data lines extend along a first direction and are arranged at intervals along a second direction, the plurality of scanning lines extend along the second direction and are arranged at intervals along the first direction, and the data line and the scanning line intersect with each other to define a plurality of sub-pixel areas; and a metal layer, located at one side of the driving circuit layer away from the base substrate, where the metal layer includes a plurality of metal blocks arranged at intervals, and the metal block is located at an intersection of the data line and the scanning line.

First claim

What is claimed is:

1. An array substrate, comprising:
a base substrate, comprising a display area and a peripheral area located at a periphery of the display area;
a driving circuit layer, located at one side of the base substrate, and located in the display area, wherein the driving circuit layer comprises a plurality of data lines and a plurality of scanning lines, the plurality of data lines extend along a first direction and are arranged at intervals along a second direction, the plurality of scanning lines extend along the second direction and are arranged at intervals along the first direction, the second direction intersects with the first direction, and the data lines and the scanning lines intersect with each other to define a plurality of sub-pixel areas;
a metal layer, located at one side of the driving circuit layer away from the base substrate, and located in the display area, wherein the metal layer comprises a plurality of metal blocks arranged at intervals, and the metal blocks are located at intersections of the data lines and the scanning lines; and
a common electrode, located at the side of the driving circuit layer away from the base substrate, wherein the common electrode comprises a plurality of touch control units arranged at intervals, and any one of the touch control units comprises a plurality of interconnected common electrode blocks; wherein
the metal layer further comprises a plurality of touch control signal lines, any one of the metal blocks comprises a touch control connecting metal piece and a metal spacer piece, the touch control connecting metal piece is connected to a touch control signal line in the touch control signal lines, and the metal spacer piece is spaced apart from the touch control signal lines; and
the metal spacer piece is connected to a common electrode block in the common electrode blocks through a via, the metal spacer piece comprises a first edge, a second edge and a third edge connected in sequence, the second edge and the third edge are located at one side, along the first direction, of the first edge and are parallel to the first edge, a distance between the second edge and the first edge is greater than a distance between the third edge and the first edge, and an orthographic projection, on the base substrate, of the via for connecting the metal spacer piece and the common electrode block is located between orthographic projections, on the base substrate, of the first edge and the second edge.

2. The array substrate according to claim 1 , wherein orthographic projections of the touch control signal lines on the base substrate are located outside of orthographic projections of the sub-pixel areas on the base substrate, and the orthographic projections of the touch control signal lines on the base substrate at least partially overlap with orthographic projections of the data lines on the base substrate.

3. The array substrate according to claim 2 , wherein the array substrate further comprises:
a plurality of pixel electrodes, located at one side of the common electrode away from the base substrate; wherein
the metal layer is located between the driving circuit layer and the common electrode, or is located at the side of the common electrode away from the base substrate; and
the touch control connecting metal piece comprises a first touch control metal piece and a second touch control metal piece, wherein any one of the touch control signal lines is connected through the first touch control metal piece to one of the common electrode blocks in the touch control units, and the second touch control metal piece is not connected to the common electrode blocks.

4. The array substrate according to claim 3 , wherein any one of the touch control units comprises the plurality of common electrode blocks arranged in an array, at least two of the common electrode blocks are arranged along the first direction to form a column, and at least two of the common electrode blocks are arranged along the second direction to form a row;
two adjacent rows of the common electrode blocks in any one of the touch control units are connected to each other through a row connecting portion, and two adjacent columns of the common electrode blocks in any one of the touch control units are connected to each other through a column connecting portion; and
the column connecting portion comprises an upper connecting part connected to an upper region of the two adjacent columns of the common electrode blocks, and a lower connecting part connected to a lower region of the two adjacent columns of the common electrode blocks.

5. The array substrate according to claim 4 , wherein the sub-pixel areas comprise a red sub-pixel area, a green sub-pixel area and a blue sub-pixel area, at least one red sub-pixel area, at least one green sub-pixel area and at least one blue sub-pixel area are arranged along the second direction to form a pixel unit region, and one pixel unit region corresponds to one of the common electrode blocks; and
an orthographic projection of the row connecting portion on the base substrate is located between orthographic projections, on the base substrate, of two adjacent sub-pixel areas corresponding to the two adjacent rows of the common electrode blocks connected to the row connecting portion.

6. The array substrate according to claim 5 , wherein any one of the common electrode blocks comprises a main body, and a first protruding portion and a second protruding portion that are connected to one side of the main body; the first protruding portion is connected to a middle part of the side of the main body, an orthographic projection of the first protruding portion on the base substrate is located between orthographic projections, on the base substrate, of two adjacent sub-pixel areas corresponding to the any one of the common electrode blocks, and the second protruding portion is connected to a corner of the main body;
the metal spacer piece comprises a first spacer, wherein an orthographic projection of the first spacer on the base substrate at least partially overlaps with the orthographic projection of the first protruding portion on the base substrate, and the first spacer is connected to the first protruding portion through a via;
a number of the first protruding portion is multiple, and a part of first protruding portions are used as the row connecting portion; and
an orthographic projection of the first touch control metal piece on the base substrate at least partially overlaps with an orthographic projection, on the base substrate, of the second protruding portion of the one of the common electrode blocks in the touch control units, and the first touch control metal piece is connected to the second protruding portion through a via.

7. The array substrate according to claim 5 , wherein any one of the orthographic projections of the touch control signal lines on the base substrate is located between orthographic projections, on the base substrate, of the red sub-pixel area and the blue sub-pixel area.

8. The array substrate according to claim 3 , wherein the metal spacer piece has a dimension of 16-17 μm in the second direction, the distance between the first edge and the second edge is 11.6-12.6 μm, and the distance between the first edge and the third edge is 9.2-10.2 μm.

9. The array substrate according to claim 2 , wherein in the second direction, orthographic projections, on the base substrate, of a part of the data lines are located within orthographic projections of the touch control signal lines on the base substrate.

10. The array substrate according to claim 9 , wherein in the second direction, any one of the touch control signal lines has a width of 5.2-6.2 μm, and any

Assignees

• Hefei Xinsheng Optoelectronics Technology Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Lv Fengzhen
• Xie Yongxian
• Zou Zhixiang
• Tang Chuanjiang
• Qu Feng
• Yang Tong
• Ma Xiaoye
• Zhang Ran

Classifications

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• G02F1/136286

  Wiring, e.g. gate line, drain line · CPC title

• G02F1/134336

  Matrix · CPC title

• G02F1/13394

  spacers regularly patterned on the cell subtrate, e.g. walls, pillars (G02F1/133377 takes precedence) · CPC title