Display panel, method for driving the same and display device

Patent metadata

Field	Value
Publication number	US-12288536-B2
Application number	US-202418413298-A
Country	US
Kind code	B2
Filing date	Jan 16, 2024
Priority date	Jun 30, 2023
Publication date	Apr 29, 2025
Grant date	Apr 29, 2025

Abstract

A display panel, a method for driving the display panel, and a display device are provided. In an embodiment, the display panel includes: a first substrate; a display dielectric layer located at a side of the first substrate; pixel electrodes and peek-proof electrodes, all of the pixel electrodes and the peek-proof electrodes being arranged between the first substrate and the display dielectric layer; and a light-shielding structural layer including a light-shielding structure and a hollow-out portion. In an embodiment, along a direction perpendicular to a plane of the display panel, the peek-proof electrodes overlap with the light-shielding structure, and the pixel electrodes overlap with the hollow-out portion; and the light-shielding structural layer is located at a side of the peek-proof electrodes adjacent to a light exit surface of the display panel.

First claim

What is claimed is:

1. A display panel, comprising:
a first substrate;
a display dielectric layer located at a side of the first substrate;
pixel electrodes and peek-proof electrodes, all of the pixel electrodes and the peek-proof electrodes being arranged between the first substrate and the display dielectric layer; and
a light-shielding structural layer comprising a light-shielding structure and a hollow-out portion, wherein along a direction perpendicular to a plane of the display panel, the peek-proof electrodes overlap with the light-shielding structure, and the pixel electrodes overlap with the hollow-out portion; and the light-shielding structural layer is located at a side of the peek-proof electrodes adjacent to a light exit surface of the display panel,
wherein the display panel further comprises data lines, a first switch, and a second switch, and
wherein one of the peek-proof electrodes is electrically connected to one of the data lines through the first switch, and one of the pixel electrodes is electrically connected to one of the data lines through the second switch different from the first switch.

2. The display panel according to claim 1 , wherein, along the direction perpendicular to the plane of the display panel, the light-shielding structure covers the peek-proof electrodes.

3. The display panel according to claim 1 , wherein the peek-proof electrodes and the pixel electrodes are provided on a same layer.

4. The display panel according to claim 1 ,
wherein at least one of the peek-proof electrodes and an adjacent pixel electrode of the pixel electrodes are electrically connected to a same data line of the data lines respectively through the first switch and the second switch.

5. The display panel according to claim 4 , wherein the first switch comprises a first transistor, and the second switch comprises a second transistor; and
wherein at least one of the peek-proof electrodes and an adjacent pixel electrode of the pixel electrodes are respectively electrically connected to a first electrode of the first transistor and a first electrode of the second transistor; and a second electrode of the first transistor and a second electrode of the second transistor are reused as one electrode and electrically connected to a same one of the data lines.

6. The display panel according to claim 4 , wherein a control terminal of the first switch is electrically connected to a first scanning line, and a control terminal of the second switch is electrically connected to a second scanning line.

7. The display panel according to claim 6 , wherein, along the direction perpendicular to the plane of the display panel, the first scanning line does not overlap with the second switch, and the second scanning line does not overlap with the first switch.

8. The display panel according to claim 6 , wherein an extension direction of the first scanning line is the same as an extension direction of a main body of one of the data lines, and the extension direction of the first scanning line is intersected with an extension direction of the second scanning line.

9. The display panel according to claim 8 , wherein, along the direction perpendicular to the plane of the display panel, the first scanning line overlaps with the data lines; or
wherein the first scanning line comprises a main portion and a protrusion that are electrically connected to each other; and along the direction perpendicular to the plane of the display panel, the main portion at least partially overlaps with the data lines, and the protrusion overlaps with the first switch; or
wherein the first scanning line comprises a first portion and a second portion that are electrically connected to each other; and along the direction perpendicular to the plane of the display panel, the first portion overlaps with the second scanning line, and the second portion does not overlap with the second scanning line; and the first portion and the second scanning line are provided on different layers, and the second portion and the second scanning line are provided on a same layer.

10. The display panel according to claim 6 , wherein, along the direction perpendicular to the plane of the display panel, the peek-proof electrodes do not overlap with the data lines and do not overlap with the first scanning line; or
wherein, along the direction perpendicular to the plane of the display panel, the peek-proof electrode overlaps with at least one of the data line and the first scanning line.

11. The display panel according to claim 6 , wherein the first switch comprises a first transistor, and the second switch comprises a second transistor; and wherein the first scanning line is located at a side of a semiconductor layer of the first transistor away from the light exit surface of the display panel, and the second scanning line is located at a side of a semiconductor layer of the second transistor adjacent to the light exit surface of the display panel; or the second scanning line is located at a side of a semiconductor layer of the second transistor away from the light exit surface of the display panel, and the first scanning line is located at a side of a semiconductor layer of the first transistor adjacent to the light exit surface of the display panel; or
wherein a film layer of the first scanning line is located between a film layer of the second scanning line and a film layer of the data lines; or a film layer of the second scanning line is located between a film layer of the first scanning line and a film layer of the data lines.

12. The display panel according to claim 6 , comprising a plurality of first scanning lines, wherein at least two first scanning lines of the plurality of first scanning lines are connected with each other.

13. The display panel according to claim 12 , comprising a plurality of first scanning lines, wherein all first scanning lines of the plurality of first scanning lines are connected with each other.

14. The display panel according to claim 1 , wherein the data lines comprise a first data line, and a second data line, and
wherein one of the peek-proof electrodes is electrically connected to the first data line through the first switch, and one of the pixel electrodes is electrically connected to the second data line through the second switch.

15. The display panel according to claim 1 , wherein one of the peek-proof electrodes is located between at least adjacent pixel electrodes of the pixel electrodes along a first direction, and/or between at least adjacent pixel electrodes of the pixel electrodes along a second direction; wherein the first direction is intersected with the second direction.

16. The display panel according to claim 15 , wherein the pixel electrodes comprise a green sub-pixel electrode, and one of the peek-proof electrodes is adjacent to the green sub-pixel electrode.

17. The display panel according to claim 1 , wherein a display mode of the display panel comprises a first mode, the display panel achieves narrow viewing angle (NVA) display in the first mode, and in the first mode, at least one of the pixel electrodes and at least one of the peek-proof electrodes receive a voltage signal.

18. A method for driving the display panel, the display panel comprising:
a first substrate;
a display dielectric layer located at a side of the first substrate;
pixel electrodes and peek-proof electrodes, all of the pixel electrodes and the peek-proof electrodes being arranged between the first substrate and the display dielectric layer; and
a light-shielding structural layer

Assignees

• Xiamen Tianma Micro Electronics Co Ltd

Inventors

• Lin Meihong
• Wang Yuchao
• Yu Yanping

Classifications

• H10D86/441 Primary

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• G09G2330/021

  Power management, e.g. power saving · CPC title

• G09G2320/068

  for control of viewing angle adjustment · CPC title

• G09G2320/0626

  for control of overall brightness · CPC title