Card and host apparatus

Patent metadata

Field	Value
Publication number	US-12287694-B2
Application number	US-202318462493-A
Country	US
Kind code	B2
Filing date	Sep 7, 2023
Priority date	Dec 27, 2004
Publication date	Apr 29, 2025
Grant date	Apr 29, 2025

Abstract

A host apparatus, into which a card having a nonvolatile semiconductor memory is inserted, issues a check command to the card. The check command instructs to send information on whether the card supports a termination process in which the card shifts into a state ready for a stop of power supply from the host apparatus.

First claim

The invention claimed is:

1. A memory system comprising:
a host device; and
a memory device including a memory core and a memory controller, the memory device connected to the host device,
the host device configured to:
send a first command to the memory device,

the memory controller configured to:
transmit, in response to the first command, a response of status data that is used to determine whether the memory device supports a termination process, the termination process including shifting into a state ready for a stop of power supply from the host device,

the host device configured to:
receive the response transmitted from the memory device in response to the first command, and
send a function stop command to the memory device so that the memory device performs the termination process in response to the function stop command,

the memory controller configured to:
perform the termination process in response to the function stop command from the host device, and
transmit a first signal indicative of a busy state while performing the termination process,

the host device configured to:
receive the first signal indicative of the busy state while performing the termination process,

the memory controller configured to:
notify the host device of completion of the busy state by transmitting a second signal indicative of a ready state when the memory device completes the termination process, and

the host device configured to:
receive the second signal indicative of the ready state.

2. The memory system according to claim 1 , wherein the memory core includes a nonvolatile memory and the memory device further includes a volatile memory.

3. The memory system according to claim 2 , wherein the termination process includes writing data stored in the volatile memory into the nonvolatile memory.

4. The memory system according to claim 1 , wherein the memory device is configured to change information to indicate that the termination process has not been completed when a status of the memory device has changed since completion of latest initialization.

5. The memory system according to claim 4 , wherein the memory controller is configured to:
receive an initialization command instructing to carry out initialization,
execute initialization using a first initialization method when the information indicates that the termination process has not been completed, and
execute initialization using a second initialization method, which is finished quicker than the first initialization method, when a nonvolatile memory indicates that the termination process has been completed.

6. The memory system according to claim 5 , wherein the second initialization method comprises the first initialization method with a part of it omitted.

7. The memory system according to claim 6 , wherein the omitted part includes at least one of: checking for errors of data stored in the nonvolatile memory; restoring the errors; and constructing a translation table showing a relation between logical addresses of write data and physical addresses of the nonvolatile memory which stores the write data.

Assignees

• Kioxia Corp

Inventors

• Fujimoto Akihisa

Classifications

• G06F3/0625

  Power saving in storage systems · CPC title

• G06F3/0604

  Improving or facilitating administration, e.g. storage management · CPC title

• G06F12/0246

  in block erasable memory, e.g. flash memory · CPC title

• G06F3/0659

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

• G06K19/07732

  the record carrier having a housing or construction similar to well-known portable memory devices, such as SD cards, USB or memory sticks (housings for electrical equipment in general, see H05K5/02) · CPC title