Display panel and display device

Patent metadata

Field	Value
Publication number	US-12284873-B2
Application number	US-202117646626-A
Country	US
Kind code	B2
Filing date	Dec 30, 2021
Priority date	Sep 14, 2021
Publication date	Apr 22, 2025
Grant date	Apr 22, 2025

Abstract

Display panel and display device are provided. The display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a driving transistor and an initialization transistor. The initialization transistor is configured to provide an initialization signal for a preset node. The preset node is a gate of the driving transistor, or an anode of the light-emitting element. The pixel circuit includes an oxide semiconductor transistor and a silicon transistor. An active layer of the oxide semiconductor transistor includes an oxide semiconductor, and an active layer of the silicon transistor includes silicon. The pixel circuit includes a first pixel circuit and a second pixel circuit. The first pixel circuit includes a first initialization transistor. The second pixel circuit includes a second initialization transistor. An active layer of the first initialization transistor is connected to an active layer of the second initialization transistor through a first connection wire.

First claim

What is claimed is:

1. A display panel, comprising:
a pixel circuit; and
a plurality of light-emitting elements,
wherein:
the pixel circuit includes a driving transistor and an initialization transistor, wherein the initialization transistor is configured to provide an initialization signal for a preset node, and the preset node is a gate of the driving transistor, or an anode of a light-emitting element;
the pixel circuit includes an oxide semiconductor transistor and a silicon transistor, wherein an active layer of the oxide semiconductor transistor includes an oxide semiconductor, and an active layer of the silicon transistor includes silicon;
the pixel circuit includes a first pixel circuit and a second pixel circuit, wherein the first pixel circuit includes a first initialization transistor, the second pixel circuit includes a second initialization transistor, and the first pixel circuit and the second pixel circuit are connected to different light-emitting elements;
an active layer of the first initialization transistor is directly connected to an active layer of the second initialization transistor through a first connection wire, and at least a portion of the first connection wire and the active layer of the oxide semiconductor transistor are located on a same layer;
the first pixel circuit and the second pixel circuit are arranged along a first direction;
the first connection wire extends from the active layer of the first initialization transistor along the first direction to the active layer of the second initialization transistor; and
the display panel further includes a first signal line extending along the first direction, wherein the first signal line transmits an initialization signal for the pixel circuit.

2. The display panel according to claim 1 , wherein:
the first connection wire includes a first oxide semiconductor, and the active layer of the initialization transistor includes a second oxide semiconductor; and
an electrical conductivity of the first connection wire is greater than an electrical conductivity of a channel region of the active layer of the initialization transistor.

3. The display panel according to claim 1 , wherein:
the first signal line and the first connection wire do not overlap.

4. The display panel according to claim 1 , wherein:
the pixel circuit further includes a third pixel circuit, and the third pixel circuit includes a third initialization transistor;
the first pixel circuit and the third pixel circuit are arranged along a second direction, and the first direction and the second direction intersect;
the active layer of the first initialization transistor and an active layer of the third initialization transistor are connected through a second connection wire extending in the second direction; and
at least a portion of the second connection wire and an active layer of at least one of the first initialization transistor and the third initialization transistor are located on a same layer.

5. The display panel according to claim 4 , further comprising an integrated chip, wherein:
the integrated chip is located on a side frame of a display area of the display panel;
the integrated chip provides the initialization signal for the pixel circuit; and
a width of the second connection wire is greater than a width of the first connection wire.

6. The display panel according to claim 4 , further comprising a second signal line extending along the second direction, wherein:
the second signal line provides a control signal or an input signal for the pixel circuit; and
the second connection wire and the second signal line do not overlap.

7. The display panel according to claim 1 , further comprising a signal line, wherein:
the signal line provides a control signal or an input signal for the pixel circuit, and the signal line extends along the first direction;
the first pixel circuit and the second pixel circuit are arranged along the first direction, and at least a portion of the first connection wire is a curve line or a polyline;
the first connection wire includes a first sub-connection wire, and the first sub-connection wire extends along the first direction; and
the first sub-connection wire and the signal line do not overlap.

8. The display panel according to claim 1 , further comprising an initialization signal line, wherein:
the first pixel circuit and the second pixel circuit are arranged along a first direction;
the initialization signal line extends along the first direction;
the initialization signal line is configured to provide the initialization signal for the initialization transistor; and
the initialization signal line and the first connection wire at least partially overlap.

9. The display panel according to claim 1 , further comprising an initialization signal line, wherein:
the first pixel circuit and the second pixel circuit are arranged along the first direction, and the first connection wire extends along the first direction;
the initialization signal line extends along a second direction, and the initialization signal line is configured to provide an initialization signal for the initialization transistor; and
the first direction and the second direction intersect.

10. The display panel according to claim 1 , wherein:
the preset node is the gate of the driving transistor, wherein:
the driving transistor is a P-type transistor, and the first connection wire and the active layer of the silicon transistor in the pixel circuit do not overlap; or
the driving transistor is an N-type transistor, and the first connection wire and the active layer of the oxide semiconductor transistor in the pixel circuit do not overlap.

11. The display panel according to claim 1 , wherein:
the preset node is an anode of the light-emitting element; and
the first connection wire and the active layer of the silicon transistor in the pixel circuit do not overlap.

12. The display panel according to claim 1 , wherein:
portions of the active layers of the first initialization transistor and the second initialization transistor connected to the first connection wire extend along a third direction; and
the first connection wire extends along a fourth direction, wherein the third direction and the fourth direction intersect.

13. The display panel according to claim 1 , wherein:
the pixel circuits include pixel-circuit groups repeatedly arranged along a fifth direction, and at least one pixel-circuit group of the pixel-circuit groups includes the first pixel circuit and the second pixel circuit arranged adjacent to each other;
a distance between active layers of initialization transistors of two adjacent pixel-circuit groups is greater than a distance between the active layers of the initialization transistors of the first pixel circuit and the second pixel circuit in the pixel-circuit group; and
the active layers of the initialization transistors of the pixel circuits in two adjacent pixel-circuit groups are not connected through the first connection wire.

14. The display panel according to claim 1 , further comprising a first voltage signal line and a data signal line, wherein:
the first voltage signal line is configured to provide the pixel circuit with a first voltage signal; and
the data signal line is configured to provide the pixel circuit with a data signal,
wherein
the first connection wire, the first voltage signal line, and the data signal line extend in a same direction, and
any two of the first connection wire, the first voltage signal line, and the data signal line do not overlap; or an overlap area S 1 between the first con

Assignees

• Xiamen Tianma Display Tech Co Ltd

Inventors

• Yang Jinjin
• Lai Qingjun
• Zhu Yihua

Classifications

• H10K59/1315

  comprising structures specially adapted for lowering the resistance · CPC title

• H10K59/1213 Primary

  the pixel elements being TFTs · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/423

  comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title