Imaging element and distance measurement module

US12283603B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12283603-B2
Application numberUS-202117792814-A
CountryUS
Kind codeB2
Filing dateJan 18, 2021
Priority dateJan 29, 2020
Publication dateApr 22, 2025
Grant dateApr 22, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present technique relates to an imaging element and a distance measurement module capable of reducing parasitic capacity. A distance measurement module includes: a first wiring that connects predetermined transistors in first adjacent pixels to a via formed in one of first adjacent pixels and connected to a wiring formed in another layer; and a second wiring that connects predetermined transistors in second adjacent pixels to a via formed in a pixel that is adjacent to one of second adjacent pixels and connected to a wiring formed in another layer, in which the first wiring is connected to a redundant wiring. The present technique can be applied to a distance measurement sensor that performs distance measurement, for example.

First claim

Opening claim text (preview).

What is claimed is: 1. An imaging element, comprising: a first wiring that connects predetermined transistors in first adjacent pixels to a via formed in one of the first adjacent pixels and connected to a wiring formed in another layer; and a second wiring that connects predetermined transistors in second adjacent pixels to a via formed in a pixel that is adjacent to one of the second adjacent pixels and connected to a wiring formed in another layer, wherein the first wiring is connected to a redundant wiring. 2. The imaging element according to claim 1 , wherein a layer where the predetermined transistors are provided and a layer where the first wiring and the second wiring are provided are different layers. 3. The imaging element according to claim 1 , wherein each of the vias is formed into a substantially linear shape. 4. The imaging element according to claim 1 , wherein the pixels include a photoelectric conversion unit that performs photoelectric conversion, a plurality of charge accumulation units that accumulate charge obtained by the photoelectric conversion unit, and a plurality of transfer units that transfer the charge from the photoelectric conversion unit to each of the plurality of charge accumulation units, and the predetermined transistors are the transfer units. 5. The imaging element according to claim 4 , wherein the pixels further include a plurality of reset units that reset each of the plurality of charge accumulation units, a plurality of reset voltage control units that controls a voltage to be applied to each of the plurality of reset units, and a plurality of addition control units that control addition of capacity to each of the plurality of charge accumulation units, and each charge accumulation unit of the plurality of charge accumulation units is configured by a plurality of regions. 6. The imaging element according to claim 5 , wherein a plurality of regions configuring the charge accumulation units are provided in a substrate where the photoelectric conversion unit is provided, a wiring that connects the plurality of regions is provided in a wiring layer laminated on the substrate, and the first wiring and the second wiring are provided in a wiring layer different from the wiring layer. 7. The imaging element according to claim 5 , wherein the plurality of charge accumulation units, the plurality of transfer units, the plurality of reset units, the plurality of reset voltage control units, and the plurality of addition control units are linearly symmetrically disposed. 8. The imaging element according to claim 1 , further comprising: a phase shift circuit that generates a phase shift drive pulse signal obtained by shifting a drive pulse signal generated to correspond to a light emission control signal indicating an irradiation timing of a light emitting source to a plurality of phases in a time division manner in one frame period, wherein the pixels accumulate, on the basis of the phase shift drive pulse signal, charge obtained through photoelectric conversion of reflected light that is obtained by reflecting light emitted from the light emitting source by a predetermined object, and output a detection signal in accordance with the accumulated charge. 9. The imaging element according to claim 8 , further comprising a plurality of charge accumulation units, wherein the plurality of charge accumulation units include a first charge accumulation unit that accumulates the charge on the basis of the phase shift drive pulse signal, and a second charge accumulation unit that accumulates the charge on the basis of a signal with a phase inverted with respect to the phase shift drive pulse signal. 10. A distance measurement module, comprising: a light emitting unit that emits irradiation light; and a light receiving element that receives reflected light obtained by reflecting light from the light emitting unit by an object, wherein the light receiving element includes a photoelectric conversion unit that performs photoelectric conversion, a plurality of charge accumulation units that accumulate charge obtained by the photoelectric conversion unit, a plurality of transfer units that transfer the charge from the photoelectric conversion unit to each of the plurality of charge accumulation units, a first wiring that connects the transfer units in first adjacent pixels to a via formed in one of the first adjacent pixels and connected to a wiring formed in another layer, and a second wiring that connects the transfer units in second adjacent pixels to a via formed in a pixel adjacent to one of the second adjacent pixels and connected to a wiring formed in another layer, and the first wiring is connected to a redundant wiring.

Assignees

Inventors

Classifications

  • Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes · CPC title

  • Manufacture or treatment · CPC title

  • of conductive or resistive materials · CPC title

  • H10F39/812Primary

    Arrangements for transferring the charges in the image sensor perpendicular to the imaging plane, e.g. buried regions used to transfer generated charges to circuitry under the photosensitive region · CPC title

  • Time delay measurement, e.g. operational details for pixel components (signal extraction and conditioning G01S7/493); Phase measurement · CPC title

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What does patent US12283603B2 cover?
The present technique relates to an imaging element and a distance measurement module capable of reducing parasitic capacity. A distance measurement module includes: a first wiring that connects predetermined transistors in first adjacent pixels to a via formed in one of first adjacent pixels and connected to a wiring formed in another layer; and a second wiring that connects predetermined tran…
Who is the assignee on this patent?
Sony Semiconductor Solutions Corp
What technology area does this patent fall under?
Primary CPC classification H10F39/812. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 22 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).