Silver patterning and interconnect processes

US12282255B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12282255-B2
Application numberUS-202418739140-A
CountryUS
Kind codeB2
Filing dateJun 10, 2024
Priority dateFeb 27, 2020
Publication dateApr 22, 2025
Grant dateApr 22, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for forming a semiconductor structure is provided. The method includes depositing a hard mask layer over a substrate. The method further includes depositing a silver precursor layer over the hard mask layer. The method further includes exposing portions of the silver precursor layer to a radiation, the radiation causing a reduction of silver ions in the irradiated portions of the silver precursor layer. The method further includes removing non-irradiated portions of the silver precursor layer, resulting in a plurality of silver seed structures.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for forming a semiconductor device, comprising: depositing a hard mask layer over a substrate; depositing a silver precursor layer over the hard mask layer; exposing portions of the silver precursor layer to a radiation, the radiation causing reduction of silver ions in the irradiated portions of the silver precursor layer; removing non-irradiated portions of the silver precursor layer, resulting in a plurality of silver seed structures; forming a plurality of patterned silver structures by depositing silver on top and sidewall surfaces of the plurality of silver seed structures; and etching the hard mask layer and the substrate using the plurality of patterned silver structures as an etch mask. 2. The method of claim 1 , wherein depositing the silver precursor layer comprises applying a silver precursor solution onto a surface of the hard mask layer in a dark environment that is absent of light. 3. The method of claim 2 , wherein applying the silver precursor solution onto the surface of the hard mask layer comprises applying the silver precursor solution using spin-on coating, spray coating, dip coating, or screen printing. 4. The method of claim 2 , further comprising forming the silver precursor solution, wherein forming the silver precursor solution comprises dissolving one or more silver salts into a solvent. 5. The method of claim 4 , wherein the one or more silver salts comprise silver fluoride, silver chloride, silver bromide or combinations thereof. 6. The method of claim 4 , wherein the solvent comprises water or an alcohol. 7. The method of claim 1 , wherein exposing the portions of the silver precursor layer to the radiation comprises passing the radiation through a photomask with a predefined pattern. 8. The method of claim 1 , wherein exposing the portions of the silver precursor layer to the radiation comprises modulating the radiation with a predefined pattern. 9. The method of claim 1 , wherein exposing the portions of the silver precursor layer to the radiation comprises exposing the silver precursor layer to a gamma ray radiation. 10. A method for forming a semiconductor device, comprising: depositing a hard mask layer over a substrate; depositing a silver precursor layer over the hard mask layer; patterning the silver precursor layer to form a plurality of silver seed structures having a top surface and two opposing sidewall surfaces; depositing silver on the top surface and the sidewall surfaces of the plurality of silver seed structures, thereby forming a plurality of patterned silver structures; etching the hard mask layer and the substrate to remove portions of the hard mask layer and the substrate not covered by the plurality of patterned silver structures, thereby forming a plurality of hard mask structures and a plurality of semiconductor fins protruding from a base portion of the substrate; and removing the plurality of patterned silver structures and the plurality of hard mask structures from the plurality of semiconductor fins. 11. The method of claim 10 , further comprising forming one or gate structures and doped source/drain regions over the plurality of semiconductor fins. 12. The method of claim 10 , the hard mask layer and the substrate are etched by a fluorine-containing gas. 13. The method of claim 10 , wherein the silver precursor layer comprises a silver salt, and the plurality of silver seed structures comprises silver metal. 14. The method of claim 10 , wherein patterning the silver precursor layer comprises: irradiating portions of the silver precursor layer with gamma ray radiation, wherein the gamma ray radiation reduces silver ions in the irradiated portions of the silver precursor layer to form silver metal; and after irradiation, developing the silver precursor layer with a developer to remove non-irradiated portions of the silver precursor layer. 15. The method of claim 14 , wherein the developer is water. 16. The method of claim 10 , further comprising annealing the plurality of patterned silver structures after forming the plurality of the patterned silver structures. 17. The method of claim 16 , wherein the plurality of patterned silver structures is annealed at a temperature below a melting temperature of silver. 18. A method for forming a semiconductor device, comprising: forming a hard mask layer over a semiconductor substrate; depositing a silver precursor layer over the hard mask layer, wherein the silver precursor layer comprises a silver salt; irradiating portions of the silver precursor layer to reduce silver ions in the silver salt, thereby forming a plurality of silver seed structures comprising silver metal; removing non-irradiated portions of the silver precursor layer; depositing silver over top and sidewall surfaces of the plurality of silver seed structures to form a plurality of patterned silver structures, the plurality of patterned silver structures having a dimension greater than a dimension of the plurality of silver seed structures; etching the hard mask layer to form a plurality of hard mask structures using the plurality of patterned silver structures as an etch mask; and etching the semiconductor substrate to form a plurality of semiconductor fins using the plurality of the patterned silver structures as an etch mask. 19. The method of claim 18 , wherein irradiating the portions of the silver precursor layer comprises irradiating with a gamma ray radiation. 20. The method of claim 19 , wherein the gamma ray radiation is irradiating through a photomask.

Assignees

Inventors

Classifications

  • characterised by the processes involved to create the masks · CPC title

  • characterised by their composition, e.g. multilayer masks · CPC title

  • Barrier, adhesion or liner layers · CPC title

  • involving partial etching of via holes · CPC title

  • involving multiple stacked pre-patterned masks · CPC title

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Frequently asked questions

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What does patent US12282255B2 cover?
A method for forming a semiconductor structure is provided. The method includes depositing a hard mask layer over a substrate. The method further includes depositing a silver precursor layer over the hard mask layer. The method further includes exposing portions of the silver precursor layer to a radiation, the radiation causing a reduction of silver ions in the irradiated portions of the silve…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P76/2041. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 22 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).