Pixel driving circuit, display panel and display device

Patent metadata

Field	Value
Publication number	US-12277906-B2
Application number	US-202218029829-A
Country	US
Kind code	B2
Filing date	Apr 7, 2022
Priority date	Apr 7, 2022
Publication date	Apr 15, 2025
Grant date	Apr 15, 2025

Abstract

A pixel driving circuit is used for driving a light emitting element, in the pixel driving circuit, a first terminal of the driving sub-circuit being coupled to a power supply line; a compensation sub-circuit is respectively coupled to a scanning line, a control terminal of the driving sub-circuit, and a second terminal of the driving sub-circuit; a first terminal of the coupling sub-circuit being coupled to the control terminal of the driving sub-circuit; a first terminal of the storage sub-circuit being coupled to a second terminal of the coupling sub-circuit; a data writing-in sub-circuit is respectively coupled to a second terminal of the storage sub-circuit, a data line, and a reset line; a first reset sub-circuit is respectively coupled to the reset line, an initialization signal line, the control terminal of the driving sub-circuit, and the second terminal of the coupling sub-circuit.

First claim

What is claimed is:

1. A display substrate, comprising a plurality of pixel driving circuits for driving a light emitting element, wherein the pixel driving circuit comprises:
a driving sub-circuit, a first terminal of the driving sub-circuit being coupled to a power supply line;
a compensation sub-circuit, respectively coupled to a scanning line, a control terminal of the driving sub-circuit, and a second terminal of the driving sub-circuit; configured to control to connect or disconnect the control terminal and the second terminal of the driving sub-circuit under the control of the scanning line;
a coupling sub-circuit, a first terminal of the coupling sub-circuit being coupled to the control terminal of the driving sub-circuit;
a storage sub-circuit, a first terminal of the storage sub-circuit being coupled to a second terminal of the coupling sub-circuit;
a data writing-in sub-circuit, respectively coupled to a second terminal of the storage sub-circuit, a data line, and a reset line; configured to control to connect or disconnect the second terminal of the storage sub-circuit and the data line under the control of the reset line;
a first reset sub-circuit, respectively coupled to the reset line, an initialization signal line, the control terminal of the driving sub-circuit, and the second terminal of the coupling sub-circuit; configured to, under the control of the reset line, control to connect or disconnect the initialization signal line and the control terminal of the driving sub-circuit and control to connect or disconnect the initialization signal line and the second terminal of the coupling sub-circuit;
a first maintenance sub-circuit, respectively coupled to the scanning line, the second terminal of the coupling sub-circuit, and the initialization signal line; configured to control to connect or disconnect the second terminal of the coupling sub-circuit and the initialization signal line under the control of the scanning line; and
a second maintenance sub-circuit, respectively coupled to the a first control line, a reference signal line and the second terminal of the storage sub-circuit; configured to control to connect or disconnect the reference signal line and the second terminal of the storage sub-circuit under the control of the first control line;
wherein the pixel driving circuit comprises a first capacitor and a third transistor, and the first capacitor includes a first electrode plate and a second electrode plate oppositely arranged, and the first electrode plate is multiplexed as a gate electrode of the third transistor;
the display substrate includes:
a plurality of data lines, wherein the data line includes at least a portion extending along the first direction, an orthographic projection of the data line on a base substrate of the display substrate and an orthographic projection of the first electrode plate on the base substrate are arranged along a second direction, the first direction intersects the second direction;
a plurality of first shielding patterns, wherein at least part of an orthographic projection of the first shielding pattern on the base substrate is located between the orthographic projection of the data line on the base substrate and the orthographic projection of the first electrode plate on the base substrate; and/or
at least part of the orthographic projection of the first shielding pattern on the base substrate is located between the orthographic projection of the data line on the base substrate and an orthographic projection of the second electrode plate on the base substrate;
wherein the pixel driving circuit further comprises a second capacitor, the second capacitor includes a third electrode plate and a fourth electrode plate oppositely arranged, the third electrode plate is coupled to the second electrode plate;
the third electrode plate and the second electrode plate are arranged along the first direction;
at least part of the orthographic projection of the first shielding pattern on the base substrate is located between the orthographic projection of the data line on the base substrate and an orthographic projection of the third electrode plate on the base substrate and/or,
at least part of the orthographic projection of the first shielding pattern on the base substrate is located between the orthographic projection of the data line on the base substrate and an orthographic projection of the fourth electrode plate on the base substrate.

2. The display substrate according to claim 1 , wherein the pixel driving circuit further comprises:
a light emitting control sub-circuit, respectively coupled to the second terminal of the driving sub-circuit, the light emitting element and a second control line; configured to control to connect or disconnect the second terminal of the driving sub-circuit and the light emitting element under the control of the second control line.

3. The display substrate according to claim 2 , wherein the pixel driving circuit further comprises:
a second reset sub-circuit, respectively coupled to the scanning line, the light emitting element and the initialization signal line; and configured to control to connect or disconnect the light emitting element and the initialization signal line under the control of the scanning line.

4. The display substrate according to claim 3 , wherein the coupling sub-circuit includes a first capacitor, the storage sub-circuit includes a second capacitor, the data writing-in sub-circuit includes a first transistor, the compensation sub-circuit includes a second transistor, the driving sub-circuit includes a third transistor, the first reset sub-circuit includes a fourth transistor and a fifth transistor, the second reset sub-circuit includes a sixth transistor, the first maintenance sub-circuit includes a seventh transistor, the light emitting control sub-circuit includes an eighth transistor, and the second maintenance sub-circuit includes a ninth transistor;
a gate electrode of the first transistor is coupled to the reset line, a first electrode of the first transistor is coupled to the data line, and a second electrode of the first transistor is coupled to a second terminal of the second capacitor;
a gate electrode of the second transistor is coupled to the scanning line, a first electrode of the second transistor is coupled to a second electrode of the third transistor, and a second electrode of the second transistor is coupled to a gate electrode of the third transistor;
a first electrode of the third transistor is coupled to the power supply line;
a first terminal of the first capacitor is coupled to the gate electrode of the third transistor, and a first terminal of the second capacitor is coupled to a second terminal of the first capacitor;
a gate electrode of the fourth transistor is coupled to the reset line, a first electrode of the fourth transistor is coupled to the initialization signal line, and a second electrode of the fourth transistor is coupled to the gate electrode of the third transistor;
a gate electrode of the fifth transistor is coupled to the reset line, a first electrode of the fifth transistor is coupled to the initialization signal line, and a second electrode of the fifth transistor is coupled to the second terminal of the first capacitor;
a gate electrode of the sixth transistor is coupled to the scanning line, a first electrode of the sixth transistor is coupled to the initialization signal line, and a second electrode of the sixth transistor is coupled to the light emitting element;
a gate electrode of the seventh transistor is coupled to the scanning line, a first electrode of the seventh transistor is coupled to the initialization signal line, a second electrode of the seventh transistor is coupled to the second terminal of the first capacitor;
a gate electrode of the eighth transi

Assignees

• Boe Technology Group Co Ltd

Inventors

• Zhao Xuliang
• Zhu Jianchao
• Huangfu Lujiang

Classifications

• G09G2320/0693

  Calibration of display systems · CPC title

• G09G2320/0209

  Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display · CPC title

• G09G2310/06

  Details of flat display driving waveforms · CPC title

• G09G2310/0297

  Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns · CPC title

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title