Display substrate and manufacturing method thereof, and display device

US12268079B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12268079-B2
Application numberUS-202117779784-A
CountryUS
Kind codeB2
Filing dateFeb 3, 2021
Priority dateFeb 5, 2020
Publication dateApr 1, 2025
Grant dateApr 1, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display substrate includes: a wafer base ( 1 ) provided with a transistor; a metal reflective structure ( 2 ) on the wafer base, the metal reflective structure being electrically connected to the transistor, and being provided with a protrusion ( 21 ) protruding away from the wafer base; a first insulation layer ( 3 ) on a side of the metal reflective structure away from the wafer base, a surface of a portion of the first insulation layer corresponding to the metal reflective structure and facing away from the metal reflective structure being flush with a top face of the protrusion; and a transparent anode ( 4 ) on a side of the first insulation layer facing away from the metal reflective structure, the transparent anode being in contact connection with the top face of the protrusion.

First claim

Opening claim text (preview).

What is claimed is: 1. A display substrate, comprising: a wafer base, provided with a transistor; a metal reflective structure on the wafer base, wherein the metal reflective structure is electrically connected to the transistor, and is provided with a protrusion protruding away from the wafer base; a first insulation layer on a side of the metal reflective structure facing away from the wafer base, wherein a surface of a portion, corresponding to the metal reflective structure and facing away from the metal reflective structure, of the first insulation layer is flush with a top face of the protrusion, so as to enable the top face of the protrusion to be exposed, and the top face of the protrusion is a surface of the protrusion facing away from the first insulation layer; and a transparent anode on a side of the first insulation layer facing away from the metal reflective structure, wherein the transparent anode is in contact connection with the top face of the protrusion. 2. The display substrate according to claim 1 , wherein in a direction perpendicular to the wafer base, a thickness of the first insulation layer is equal to a height of the protrusion. 3. The display substrate according to claim 1 , further comprising: a metal wire located on the transistor and electrically connected to the transistor; and a second insulation layer on the metal wire; wherein the second insulation layer is provided with a via hole, joint metal electrically connected to the metal wire is arranged in the via hole, in a direction perpendicular to the wafer base, a top face of the joint metal is higher than a surface of a side of the second insulation layer facing away from the metal wire, and the top face of the joint metal is a surface of the joint metal facing away from the metal wire; and the metal reflective structure is located on a side of the second insulation layer facing away from the metal wire, the metal reflective structure is electrically connected to the metal wire through the joint metal, and a protrusion of the metal reflective structure is opposite to the joint metal. 4. The display substrate according to claim 3 , wherein the joint metal comprises tungsten. 5. The display substrate according to claim 3 , wherein the metal wire comprises a second metal layer, a metal aluminum layer and a third metal layer which are laminated in sequence, and the metal aluminum layer is located on a side of the second metal layer facing away from the transistor; the second metal layer comprises a metal titanium layer, a titanium nitride layer, or a double-layer structure of a metal titanium layer and a titanium nitride layer; and the third metal layer comprises a metal titanium layer, a titanium nitride layer, or a double-layer structure of a metal titanium layer and a titanium nitride layer. 6. The display substrate according to claim 1 , wherein the transparent anode comprises ITO. 7. The display substrate according to claim 1 , wherein the metal reflective structure comprises a first metal layer, an aluminum metal layer and a titanium nitride layer which are laminated in sequence, and the aluminum metal layer is located on a side of the first metal layer facing away from the first insulation layer; and the first metal layer is a metal titanium layer or a double-layer structure of a metal titanium layer and a titanium nitride layer which are arranged in a laminated mode. 8. The display substrate according to claim 1 , further comprising: an organic light-emitting device and a transparent cathode which are located on the transparent anode in sequence. 9. A display device, comprising the display substrate according to claim 1 . 10. A manufacturing method of the display substrate, comprising: providing a wafer base, and forming a transistor on the wafer base; patterning a metal reflective structure on the wafer base, wherein the metal reflective structure is electrically connected to the transistor, and is provided with a protrusion protruding away from the wafer base; forming a first insulation layer on a side of the metal reflective structure facing away from the wafer base, and processing the first insulation layer through a patterning process, so as to enable a surface of a portion, corresponding to the metal reflective structure and facing away from the metal reflective structure, of the first insulation layer to be flush with a top face of the protrusion and expose the top face of the protrusion, wherein the top face of the protrusion is a surface of the protrusion facing away from the first insulation layer; and patterning a transparent anode on a side of the first insulation layer facing away from the metal reflective structure, wherein the transparent anode is in contact connection with the top face of the protrusion. 11. The manufacturing method according to claim 10 , wherein, in a direction perpendicular to the wafer base, a thickness of the first insulation layer is equal to a height of the protrusion; and said processing the first insulation layer through the patterning process, comprises: only removing a portion of the first insulation layer on the top face of the protrusion through the patterning process. 12. The manufacturing method according to claim 10 , wherein after forming the transistor on the wafer base, the method further comprises: patterning a metal wire electrically connected to the transistor on a side of the transistor facing away from the wafer base; forming a second insulation layer on a side of the metal wire facing away from the wafer base, forming a via hole in the second insulation layer, and forming joint metal in the via hole; and processing surfaces of the second insulation layer and the joint metal by adopting a chemical mechanical polishing method to obtain that the top face of the joint metal is higher than a surface of a side of the second insulation layer facing away from the metal wire.

Assignees

Inventors

Classifications

  • Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title

  • Active-matrix OLED [AMOLED] displays · CPC title

  • Anodes · CPC title

  • Reflective anodes, e.g. ITO combined with thick metallic layers · CPC title

  • Insulating layers formed between TFT elements and OLED elements · CPC title

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What does patent US12268079B2 cover?
A display substrate includes: a wafer base ( 1 ) provided with a transistor; a metal reflective structure ( 2 ) on the wafer base, the metal reflective structure being electrically connected to the transistor, and being provided with a protrusion ( 21 ) protruding away from the wafer base; a first insulation layer ( 3 ) on a side of the metal reflective structure away from the wafer base, a sur…
Who is the assignee on this patent?
Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/80518. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 01 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).