High electron mobility transistor and method for forming the same

Patent metadata

Field	Value
Publication number	US-12266701-B2
Application number	US-202318199359-A
Country	US
Kind code	B2
Filing date	May 18, 2023
Priority date	Aug 11, 2020
Publication date	Apr 1, 2025
Grant date	Apr 1, 2025

Abstract

A high electron mobility transistor includes a substrate, a mesa structure disposed on the substrate, a passivation layer disposed on the mesa structure, and at least a contact structure disposed in the passivation layer and the mesa structure. The mesa structure includes a channel layer, a barrier layer on the channel layer, two opposite first edges extending along a first direction, and two opposite second edges extending along a second direction. The contact structure includes a body portion and a plurality of protruding portions. The body portion penetrates through the passivation layer. The protruding portions penetrate through the barrier layer and a portion of the channel layer. In a top view, the body portion overlaps the two opposite first edges of the mesa structure without overlapping the two opposite second edges of the mesa structure.

First claim

What is claimed is:

1. A high electron mobility transistor, comprising:
a substrate;
a mesa structure disposed on the substrate, wherein the mesa structure comprises a channel layer, a barrier layer on the channel layer, two opposite first edges extending along a first direction, and two opposite second edges extending along a second direction;
a passivation layer disposed on the mesa structure; and
at least a contact structure disposed in the passivation layer and the mesa structure, wherein the contact structure comprises a body portion and a plurality of protruding portions, the body portion penetrates through the passivation layer and overlaps and directly contacts the two opposite first edges of the mesa structure without overlapping the two opposite second edges of the mesa structure, the plurality of protruding portions penetrate through the barrier layer and a portion of the channel layer.

2. The high electron mobility transistor according to claim 1 , wherein a bottom surface of the body portion is flush with an upper surface of the barrier layer.

3. The high electron mobility transistor according to claim 1 , wherein the body portion extends into part of the barrier layer.

4. The high electron mobility transistor according to claim 1 , wherein the plurality of protruding portions is arranged along the first direction and the second direction to form an array in a top plane view, the first direction and the second direction are perpendicular.

5. The high electron mobility transistor according to claim 4 , wherein the plurality of protruding portions is aligned along the second direction and is staggered along the first direction.

6. The high electron mobility transistor according to claim 1 , further comprising a gate structure disposed on the mesa structure and between the contact structure and another one of the contact structure.

7. The high electron mobility transistor according to claim 6 , wherein the plurality of protruding portions of the contact structure and the gate structure extend along a same direction in a top plane view.

8. The high electron mobility transistor according to claim 6 , wherein the plurality of protruding portions of the contact structure extends along a direction that is perpendicular to a direction along that the gate structure extends.

9. The high electron mobility transistor according to claim 1 , the body portion and the plurality of protruding portions of the contact structure are of a one-piece structure.

10. The high electron mobility transistor according to claim 1 , wherein a material of the contact structure is selected from a group consisting of gold (Au), tungsten (W), cobalt (Co), nickel (Ni), titanium (Ti), molybdenum (Mo), copper (Cu), aluminum (Al), tantalum (Ta), Palladium (Pd), platinum (Pt), compound of the above materials, a composite layer of the above materials, and an alloy of the above materials.

11. The high electron mobility transistor according to claim 1 , wherein a material of the channel layer is selected from a group consisting of gallium nitride (GaN), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), indium gallium nitride (InGaN), aluminum gallium indium nitride (AlGaInN), and a combination thereof.

12. The high electron mobility transistor according to claim 1 , wherein a material of the barrier layer is selected from a group consisting of aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), aluminum gallium indium nitride (AlInGaN), aluminum nitride (AlN), and a combination thereof.

13. The high electron mobility transistor according to claim 1 , wherein a material of the passivation layer is selected from a group consisting of aluminum nitride (AlN), aluminum oxide (Al 2 O 3 ), boron nitride (BN), silicon nitride (Si 3 N 4 ), silicon oxide (SiO 2 ), zirconia (ZrO 2 ), hafnium oxide (HfO 2 ), lanthanum oxide (La 2 O 3 ), lutetium oxide (Lu 2 O 3 ), lanthanum oxide (LaLuO 3 ), and a combination thereof.

14. The high electron mobility transistor according to claim 6 , wherein the gate structure comprises a semiconductor gate layer and a gate electrode disposed on the semiconductor gate layer, two edges of the semiconductor gate layer are flush with the two opposite first edges of the mesa structure, and the gate electrode overlaps the two opposite first edges of the mesa structure with the passivation layer disposed therebetween.

Assignees

• United Microelectronics Corp

Inventors

• Yeh Chih-Tung
• Hou Chun-Liang
• Liao Wen-Jung
• Chang Chun-Ming
• Hsu Yi-Shan
• Lee Ruey-Chyr

Classifications

• H10D64/257

  for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes (source or drain electrodes of TFTs H10D30/673) · CPC title

• H10D64/256

  for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673) · CPC title

• H10D62/8503

  Nitride Group III-V materials, e.g. AlN or GaN · CPC title

• H10D64/01

  Manufacture or treatment · CPC title

• H10D62/824

  comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions · CPC title