Data storage device having dual actuators and method for emergency power off retract (EPOR) of dual actuators

Patent metadata

Field	Value
Publication number	US-12266385-B2
Application number	US-202318446637-A
Country	US
Kind code	B2
Filing date	Aug 9, 2023
Priority date	Apr 8, 2022
Publication date	Apr 1, 2025
Grant date	Apr 1, 2025

Abstract

A data storage device comprises a lead actuator that actuates a first read-write head over a first disk and a support actuator that actuates a second read-write head over a second disk. A spindle motor rotates the first and second disks. In response to an emergency power off (EPO) event, a processing device retracts and parks the actuators using an internal supply voltage generated from a back electromotive force (BEMF) voltage of the spindle motor, and brakes the spindle motor. The spindle motor is not braked until both the lead and support actuators have been retracted and parked.

First claim

What is claimed is:

1. A data storage device comprising:
a first actuator configured to actuate a first read-write head over at least a first disk;
a second actuator configured to actuate a second read-write head over at least a second disk;
a spindle motor configured to rotate the first disk and the second disk; and
one or more processing devices or components, the one or more processing devices or components comprising a system on a chip (SoC) and at least one power large scale integrated circuit (PLSI) that is configured to drive the first and second actuators, and wherein the one or more processing devices or components are configured, individually or in combination, in response to an emergency power off (EPO) event, to:
retract and park the first actuator and the second actuator using an internal supply voltage generated from a back electromotive force (BEMF) voltage of the spindle motor, and
brake the spindle motor,

and
wherein the at least one PLSI is further configured to communicate with the SoC to initiate data egress during the EPO event, and wherein the one or more processing devices or components are further configured, individually or in combination, to:
egress data to non-volatile memory, based at least in part on comparing the internal supply voltage generated from the BEMF voltage to one or more egress throttling threshold voltages.

2. The data storage device of claim 1 , wherein the one or more processing devices or components are further configured, individually or in combination, to:
not brake the spindle motor until both the first and the second actuators have been retracted and parked; and
place the first actuator into a hold state when the first actuator finishes retracting and parking before the second actuator finishes retracting and parking.

3. The data storage device of claim 2 , wherein:
the first actuator comprises a lead actuator;
the second actuator comprises a support actuator; and
the hold state places the lead actuator into a tri state.

4. The data storage device of claim 1 , wherein the at least one PLSI comprises a single PLSI that is configured to drive both the first actuator and the second actuator, and wherein the single PLSI further comprises:
a lead driver configured to drive the first actuator to retract and park; and
a support driver configured to drive the second actuator to retract and park.

5. The data storage device of claim 4 , wherein;
the single PLSI comprises an open-drain, active low output pin or nINT pin for communicating with the SoC; and
the nINT pin is configured to output a low signal for throttling egress of the data and a high signal for allowing egress of the data.

6. The data storage device of claim 1 , wherein:
the at least one PLSI comprises a lead PLSI and a support PLSI;
the first actuator comprises a lead actuator; and
the second actuator comprises a support actuator; and
the one or more processing devices or components are further configured, individually or in combination, to:
drive the lead actuator to retract and park by the lead PLSI; and
drive the support actuator to retract and park by the support PLSI.

7. The data storage device of claim 6 , wherein:
the lead PLSI comprises a lead nINT pin that is coupled to a drain of a lead metal oxide semiconductor field effect transistor (MOSFET); and
the support PLSI comprises a support nINT pin that is coupled to a drain of a support MOSFET.

8. The data storage device of claim 7 , wherein;
the lead nINT pin and the support nINT pin are tied together to indicate when both the lead actuator and the support actuator have been retracted and parked;
the lead nINT pin is configured to be pulled down to a low state when the lead PLSI is driving the lead actuator to retract and park in response to the EPO event;
the support nINT pin is configured to be pulled down to a low state when the support PLSI is driving the second actuator to retract and park in response to the EPO event; and
each of the lead nINT pin and the support nINT pin is configured to be released and pulled up to a high state when both the lead actuator and the support actuator have been retracted and parked by the lead PLSI and the support PLSI, respectively.

9. The data storage device of claim 8 , wherein the lead PLSI is configured to, based on detecting the high state on the tied lead and support nINT pins, at least one of:
initiate a data egress state; and
transition the spindle motor into a spindle braking state.

10. The data storage device of claim 1 , wherein the one or more egress throttling threshold voltages comprise:
a first egress throttling threshold voltage that is greater than an actuator throttling threshold voltage; and
a second egress throttling threshold voltage that is lower than the actuator throttling threshold voltage.

11. The data storage device of claim 10 , wherein, after the first actuator is retracted and parked, the one or more processing devices or components are further configured, individually or in combination, to:
egress the data, based at least in part on determining that the internal supply voltage is greater than the first egress throttling threshold voltage; and
egress the data, based at least in part on determining that the second actuator is retracted and parked, and that another internal supply voltage is greater than the second egress throttling threshold voltage, wherein the another internal supply voltage is lower than the internal supply voltage.

12. The data storage device of claim 11 , wherein the one or more processing devices or components are further configured, individually or in combination, to:
abort egressing of the data when the internal supply voltage is lower than a final threshold voltage, the spindle motor is braked, or a combination thereof.

13. The data storage device of claim 1 , wherein the internal supply voltage is generated using at least one of:
a synchronous rectification technique, wherein the synchronous rectification technique comprises rectifying the BEMF voltage to generate the internal supply voltage; and
a boost/brake technique, wherein the boost/brake technique comprises periodically shorting windings of the spindle motor to boost the BEMF voltage.

14. A method comprising:
actuating, by a first actuator, a first read-write head over at least a first disk;
actuating, by a second actuator, a second read-write head over at least a second disk;
rotating, by a spindle motor, the first disk and the second disk;
controlling, by one or more processing devices or components, in response to an emergency power off (EPO) event, the first actuator and the second actuator to retract and park using an internal supply voltage generated from a back electromotive force (BEMF) voltage of the spindle motor;
controlling, by the one or more processing devices or components, the spindle motor to brake;
wherein the one or more processing devices or components comprise a system on a chip (SoC) and at least one power large scale integrated circuit (PLSI) that is configured to drive the first and second actuators, and
wherein the at least one PLSI is further configured to communicate with the SoC to initiate data egress during the EPO event; and
egressing, by the one or more processing devices or components, data to non-volatile memory, based at least in part on comparing the internal supply voltage generated from the BEMF voltage to one or more egress throttling threshold voltages.

15. The method of claim 14 , further comprising placing, by the one or more processing devices or components, the first actuator into a h

Assignees

• Western Digital Tech Inc

Inventors

• Johnson Brian
• Byoun Jaesoo
• Ikedo Gaku
• Ito Hideaki
• Kagami Naoyuki
• Watanabe Hiroki

Classifications

• G11B5/4813 Primary

  Mounting or aligning of arm assemblies, e.g. actuator arm supported by bearings, multiple arm assemblies, arm stacks or multiple heads on single arm (G11B5/484 takes precedence) · CPC title

• G11B5/5573

  Details of the magnetic circuit, e.g. of actuators · CPC title

• G11B21/12

  Raising and lowering; Back-spacing or forward-spacing along track; Returning to starting position {otherwise than during transducing operation} · CPC title

• G11B5/5578 Primary

  Multiple actuators addressing the same disk, e.g. to improve data rate or access rate · CPC title