Chip card, and process for manufacturing a chip card

US12265871B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12265871-B2
Application numberUS-202218552257-A
CountryUS
Kind codeB2
Filing dateMar 23, 2022
Priority dateMar 25, 2021
Publication dateApr 1, 2025
Grant dateApr 1, 2025

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A chip card has a flexible inlay including chip card contacts on an upper face of the inlay and which supports an integrated circuit and an antenna, both of which are spaced apart from the contacts. The chip card further includes a top layer with a recess in which the contacts are placed, and a metal layer which is located below the inlay and includes a slit that extends from a peripheral surface of the metal layer to the area of the recess and extends through the entire thickness of the metal layer.

First claim

Opening claim text (preview).

The invention claimed is: 1. A chip card, including: a flexible inlay having contacts of the chip card arranged on an upper side of the inlay, wherein the inlay carries an integrated circuit and antenna spaced apart from the contacts, an upper layer having a recess, in which the contacts are arranged, and a metal layer arranged below the inlay, having a slot, which extends from a circumferential surface of the metal layer into an area of the recess, and which extends through an entire thickness of the metal layer; wherein at least one of the integrated circuit and the antenna are displaced out of the area of the recess by the inlay. 2. The chip card according to claim 1 , wherein the upper layer is a further metal layer having a slot, which extends from a circumferential surface of the further metal layer to the recess and extends through the entire thickness of the further metal layer. 3. The chip card according to claim 2 , wherein an adhesive layer having a further recess is provided between the further metal layer and the inlay, in that the further recess of the adhesive layer has smaller dimensions than the recess of the further metal layer, and in that a part of the adhesive layer is arranged between the contacts and an inner wall of the recess of the further metal layer. 4. The chip card according to claim 1 , wherein the upper layer comprises a layer having optical features and an outer overlay layer. 5. The chip card according to claim 1 , wherein the metal layer is covered using at least one outer layer. 6. The chip card according to claim 1 , wherein an insert is arranged below the contacts, which positions the contacts in the recess of the upper layer. 7. The chip card according to claim 6 , wherein a height of the insert, of the inlay, and of the contacts corresponds to a height of the recess of the upper layer. 8. The chip card according to claim 1 , wherein inner edges of the recess of the upper layer are provided with a chamfer. 9. The chip card according to claim 1 , wherein the antenna is arranged in the area of a circumferential surface of the chip card, wherein turns of the antenna are arranged to have a maximum diameter about the circumferential surface. 10. A process for manufacturing a chip card, having the following steps: providing a flexible inlay having contacts of the chip card arranged on an upper side of the inlay, wherein the inlay carries an integrated circuit and antenna spaced apart from the contacts, arranging an upper layer having a recess on the upper side of the inlay in such a way that the contacts are arranged in the recess, arranging a metal layer having a slot below the inlay, which extends from a circumferential surface of the metal layer into an area of the recess and extends through an entire thickness of the metal layer, and laminating the layers to form the chip card; wherein at least one of the integrated circuit and the antenna are displaced out of the area of the recess by the inlay. 11. A chip card, including: a flexible inlay having contacts of the chip card arranged on an upper side of the inlay, wherein the inlay carries an integrated circuit and antenna spaced apart from the contacts, an upper layer having a recess, in which the contacts are arranged, and a metal layer arranged below the inlay, having a slot, which extends from a circumferential surface of the metal layer into an area of the recess, and which extends through an entire thickness of the metal layer; wherein the upper layer is a further metal layer having a slot, which extends from a circumferential surface of the further metal layer to the recess and extends through the entire thickness of the further metal layer; and wherein an adhesive layer having a further recess is provided between the further metal layer and the inlay, in that the further recess of the adhesive layer has smaller dimensions than the recess of the further metal layer, and in that a part of the adhesive layer is arranged between the contacts and an inner wall of the recess of the further metal layer.

Assignees

Inventors

Classifications

  • the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card · CPC title

  • at least one of the integrated circuit chips being mounted as a module · CPC title

  • the record carrier being multilayered, e.g. laminated sheets (flat articles in general, see B32B37/00) · CPC title

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Frequently asked questions

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What does patent US12265871B2 cover?
A chip card has a flexible inlay including chip card contacts on an upper face of the inlay and which supports an integrated circuit and an antenna, both of which are spaced apart from the contacts. The chip card further includes a top layer with a recess in which the contacts are placed, and a metal layer which is located below the inlay and includes a slit that extends from a peripheral surfa…
Who is the assignee on this patent?
Giesecke & Devrient Epayments Gmbh
What technology area does this patent fall under?
Primary CPC classification G06K19/07722. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 01 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).