Inverter and method to measure junction temperature for thermal protection

US12264976B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12264976-B2
Application numberUS-202217836817-A
CountryUS
Kind codeB2
Filing dateJun 9, 2022
Priority dateJun 9, 2022
Publication dateApr 1, 2025
Grant dateApr 1, 2025

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A three-phase load is powered by an SPWM driven inverter having a single shunt-topology. During operation, drain-to-source resistances of transistors of each branch of the inverter are determined. Interpolation is performed on assumed drain-to-source resistances of the transistors for different temperatures to produce a non-linear model of drain-to-source resistance to temperature for the transistors, and the drain-to-source resistances determined during operation and the non-linear model are used to estimate temperature values of the transistors. Driving of the inverter can be adjusted so that conductivity of each branch is set so that power delivered by that branch is as high as possible without exceeding an allowed drain current threshold representing a threshold junction temperature. In addition, driving of the inverter can be ceased if the temperature of a transistor exceeds the threshold temperature.

First claim

Opening claim text (preview).

The invention claimed is: 1. An electric device, comprising an inverter system to be coupled to phase windings of an electric machine to drive the electric machine, the inverter system comprising: switching branches coupled between a DC supply voltage node and an intermediate node, each of the switching branches having a terminal to be coupled to a respective phase winding of the electric machine; a shunt resistor coupled between the intermediate node and ground; and control circuitry configured to apply control signals in accordance with a control scheme to the switching branches to cause the inverter system to drive the phase windings of the electric machine with a multi-phase AC power signal; wherein the control scheme is divided into sectors, with each sector being divided into periods; wherein the control circuitry is configured to, during at least some sectors of the control scheme: during a first given period: measure a shunt voltage across the shunt resistor; and measure a drain to source voltage of a first calibration transistor, the first calibration transistor being a transistor of a given switching branch; and determine a drain to source resistance of the first calibration transistor as a function of a resistance of the shunt resistor, the drain to source voltage of the first calibration transistor measured during the first given period, and the shunt voltage measured during the first given period; and wherein the control circuitry is further configured to: control driving of the given switching branch; determine a temperature of the first calibration transistor during driving of the electric machine by the inverter system based upon the drain to source resistance of the first calibration transistor; modify driving of the given switching branch so as to maintain conductivity of the first calibration transistor at a highest level at which the temperature of the first calibration transistor remains below a threshold temperature; and cease driving of the given switching branch when the temperature of the first calibration transistor exceeds the threshold temperature. 2. The electric device of claim 1 , wherein the control circuitry is further configured to, during a calibration phase, perform an interpolation on assumed values of the drain to source resistance of the first calibration transistor for given temperature values of the first calibration transistor to thereby generate a non-linear model of drain to source resistance to temperature for the first calibration transistor; and wherein the control circuitry determines the temperature of the first calibration transistor using the non-linear model and the drain to source resistance of the first calibration transistor. 3. The electric device of claim 2 , wherein the control circuitry is further configured to, during the calibration phase, normalize the assumed values of the drain to source resistance of the first calibration transistor prior to performing the interpolation. 4. The electric device of claim 2 , further comprising a case carrying at least the switching branches and the shunt resistor, with a temperature sensor being positioned within the case; and wherein the control circuitry is further configured to, during the calibration phase, read a temperature of an interior of the case from the temperature sensor; determine, from the assumed values of the drain to source resistance of the first calibration transistor for the given temperature values of the first calibration transistor, an expected drain to source resistance of the first calibration transistor for the read temperature; determine a ratio between the drain to source resistance of the first calibration transistor and the expected drain to source resistance of the first calibration transistor; and use the determined ratio to calibrate the assumed values of the drain to source resistance of the first calibration transistor for the given temperature values of the first calibration transistor prior to performing the interpolation such that the interpolation is performed on the calibrated assumed values of the drain to source resistance of the first calibration transistor for the given temperature values of the first calibration transistor. 5. The electric device of claim 4 , wherein the control circuitry is further configured to, during the calibration phase, normalize the assumed values of the drain to source resistance of the first calibration transistor prior to determining the expected drain to source resistance of the first calibration transistor for the read temperature. 6. The electric device of claim 2 , wherein the interpolation produces a second order non-linear model representing a relationship between drain to source resistance to temperature for the first calibration transistor. 7. The electric device of claim 1 , wherein the electric machine has first, second, and third phase windings; wherein the switching branches comprise: a first switching branch coupled between the DC supply voltage node and the intermediate node, the first switching branch having a first terminal to be coupled to the first phase winding; a second switching branch coupled between the DC supply voltage node and the intermediate node, the second switching branch having a second terminal to be coupled to the second phase winding; and a third switching branch coupled between the DC supply voltage node and the intermediate node, the third switching branch having a third terminal to be coupled to the third phase winding; wherein the control scheme comprises a space vector pulse width modulation (SVPWM) scheme, wherein the sectors comprise six sectors, wherein the periods comprise a plurality of periods, with each of the six sectors being divided into a plurality of periods; wherein the multi-phase AC power signal comprises a three phase AC power signal; wherein the control circuitry applies the control signals in accordance with the SVPWM scheme to the first, second, and third switching branches to cause the inverter system to drive the first, second, and third phase windings of the electric machine with the three phase AC power signal; wherein the first given period is the second period of at least some sectors of the SVPWM scheme; wherein the control circuitry is configured to, during at least some sectors of the SVPWM scheme: during a fourth period: measure the drain to source voltage of the first calibration transistor; and measure a drain to source voltage of a measured transistor, the measured transistor being a transistor of a next switching branch; determine a phase current of a given phase winding coupled to the given switching branch as a function of the drain to source voltage of the first calibration transistor measured during the fourth period and the drain to source resistance of the first calibration transistor; determine a phase current of a next phase winding coupled to the next switching branch as a function of the drain to source voltage of the measured transistor measured during the fourth period and a drain to source resistance of the measured transistor known from a prior sector of the SVPWM scheme; and determine a phase current of a remaining phase winding coupled to the remaining switching branch as a function of the phase current of the given phase winding and the phase current of the next phase winding; and wherein the control circuitry controls the driving of the first, second, and third switching branches based upon the phase current of the given phase winding, the phase current of the next phase winding, and the phase current of the remaining phase winding; and wherein the control circuitry is further configured to: determine a temperature of the measured transistor during driving of the electric machine by

Assignees

Inventors

Classifications

  • characterised by the use of the resistive element · CPC title

  • Circuits arrangements for indicating a predetermined temperature (fire detection G08B17/00) · CPC title

  • Temperature measurement using electric or magnetic components already present in the system to be measured · CPC title

  • G01K7/01Primary

    using semiconducting elements having PN junctions (G01K7/02, G01K7/16, G01K7/30 take precedence) · CPC title

  • G01K7/16Primary

    using resistive elements · CPC title

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What does patent US12264976B2 cover?
A three-phase load is powered by an SPWM driven inverter having a single shunt-topology. During operation, drain-to-source resistances of transistors of each branch of the inverter are determined. Interpolation is performed on assumed drain-to-source resistances of the transistors for different temperatures to produce a non-linear model of drain-to-source resistance to temperature for the trans…
Who is the assignee on this patent?
Stmicroelectronics Shenzhen R&D Co Ltd, Stmicroelectronics China Invest Co Ltd, Stmicroelectronics Shenzhen R&Dco Ltd
What technology area does this patent fall under?
Primary CPC classification G01K7/01. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 01 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).