Automatic assignment of device debug communication pins

Patent metadata

Field	Value
Publication number	US-12259705-B2
Application number	US-202117530633-A
Country	US
Kind code	B2
Filing date	Nov 19, 2021
Priority date	Dec 12, 2020
Publication date	Mar 25, 2025
Grant date	Mar 25, 2025

Abstract

An apparatus includes a debugger circuit, debug pins, and a test controller circuit. The test controller circuit is configured to, in a programming mode, determine a subset of the debug pins used in programming the apparatus. The test controller circuit is further configured to save a designation of the subset of the debug pins. The test controller circuit is further configured to, in a test mode subsequent to the programming mode, use the designation to route the subset of the debug pins used in programming the apparatus to the debugger circuit for debug input and output with the server.

First claim

What is claimed is:

1. An apparatus, comprising:
a plurality of debug pins to communicatively couple the apparatus with a server;
a debugger circuit; and
a test controller circuit to:
in a programming mode, determine a subset of the plurality of debug pins used to program the apparatus with an operational functionality;
save a designation of the subset of the plurality of debug pins used to program the apparatus with the operational functionality;
in a test mode subsequent to the programming mode, use the designation to route the subset of the plurality of debug pins used to program the apparatus with the operational functionality to the debugger circuit for debug input and output with the server while debugging the operational functionality; and
save the designation of the subset of the plurality of debug pins used to program the apparatus upon a determination that the server has sent a signal to enter the test mode.

2. The apparatus of claim 1 , wherein the test controller circuit is to erase the designation of the subset of the plurality of debug pins used to program the apparatus upon a determination of a power-on reset.

3. The apparatus of claim 1 , wherein the test controller circuit is to save the designation of the subset of the plurality of debug pins used to program the apparatus based upon completed reception of a code identifying a debug profile, the debug profile to define operation of the debugger circuit.

4. The apparatus of claim 3 , wherein the test controller circuit is to save the designation of the subset of the plurality of debug pins used to program the apparatus as a data pin and a clock pin used by the debug server to transmit the code to the apparatus.

5. The apparatus of claim 3 , wherein the test controller circuit is to save a different designation of the subset of the plurality of debug pins used to program the apparatus based upon completed reception of a different code identifying a different debug profile, the different debug profile to define different operation of the debugger circuit.

6. A microcontroller, comprising:
a plurality of debug pins to communicatively couple the apparatus with a server;
a debugger circuit; and
a test controller circuit to:
in a programming mode, determine a subset of the plurality of debug pins used to program the apparatus with an operational functionality;
save a designation of the subset of the plurality of debug pins used to program the apparatus with the operational functionality;
in a test mode subsequent to the programming mode, use the designation to route the subset of the plurality of debug pins used to program the apparatus with the operational functionality to the debugger circuit for debug input and output with the server while debugging the functionality; and
save the designation of the subset of the plurality of debug pins used to program the apparatus upon a determination that the server has sent a signal to enter the test mode.

7. The microcontroller of claim 6 , wherein the test controller circuit is to erase the designation of the subset of the plurality of debug pins used to program the apparatus upon a determination of a power-on reset.

8. The microcontroller of claim 6 , wherein the test controller circuit is to save the designation of the subset of the plurality of debug pins used to program the apparatus based upon completed reception of a code identifying a debug profile, the debug profile to define operation of the debugger circuit.

9. The microcontroller of claim 8 , wherein the test controller circuit is to save the designation of the subset of the plurality of debug pins used to program the apparatus as a data pin and a clock pin used by the debug server to transmit the code to the apparatus.

10. The microcontroller of claim 8 , wherein the test controller circuit is to save a different designation of the subset of the plurality of debug pins used to program the apparatus based upon completed reception of a different code identifying a different debug profile, the different debug profile to define different operation of the debugger circuit.

11. A method, comprising:
in a programming mode:
determining a subset of a plurality of debug pins of an apparatus communicatively coupled with a server, the subset of the plurality of debug pins used in programming the apparatus with an operational functionality; and
saving a designation of the subset of the plurality of debug pins used to program the apparatus with the operational functionality;
saving the designation of the subset of the plurality of debug pins used to program the apparatus upon a determination that the server has sent a signal to enter a test mode; and
in the test mode subsequent to the programming mode, use the designation to route the subset of the plurality of debug pins used in programming the apparatus with the operational functionality to the debugger circuit for debug input and output with the server while debugging the operational functionality.

12. The method of claim 11 , comprising erasing the designation of the subset of the plurality of debug pins used to program the apparatus upon a determination of a power-on reset.

13. The method of claim 11 , comprising saving the designation of the subset of the plurality of debug pins used to program the apparatus based upon completed reception of a code identifying a debug profile, the debug profile to define operation of the debugger circuit.

14. The method of claim 13 , comprising saving the designation of the subset of the plurality of debug pins used to program the apparatus as a data pin and a clock pin used by the debug server to transmit the code to the apparatus.

15. The method of claim 13 , comprising saving a different designation of the subset of the plurality of debug pins used to program the apparatus based upon completed reception of a different code identifying a different debug profile, the different debug profile to define different operation of the debugger circuit.

Assignees

• Microchip Tech Inc

Inventors

• Bowling Stephen
• Balu Manivannan
• Phoenix Timothy
• Rangarajan Sankar

Classifications

• G05B2219/33297

  Diagnostic, test, debug · CPC title

• G05B19/406 Primary

  characterised by monitoring or safety (G05B19/19 takes precedence) · CPC title

• G06F11/3656 Primary

  using a specific debug interface · CPC title