Drive apparatus and display apparatus

Patent metadata

Field	Value
Publication number	US-12254814-B2
Application number	US-202218023678-A
Country	US
Kind code	B2
Filing date	Apr 6, 2022
Priority date	Apr 6, 2022
Publication date	Mar 18, 2025
Grant date	Mar 18, 2025

Abstract

Embodiments of the present disclosure provide a drive apparatus and a display apparatus. The drive apparatus includes: a first controller configured to generate and output a data control synchronization signal after being energized, the data control synchronization signal is configured to control whether to load a data voltage onto a data line in a touch display panel to be connected; and a second controller connected with the first controller, and configured to directly output a first set level signal and a second set level signal before being energized; where the first set level signal is configured to control the selection of a display drive mode from a plurality of drive modes supported by the touch display panel to be connected; and the second set level signal is configured to control the output of a drive signal corresponding to the display drive mode to the touch display panel to be connected.

First claim

What is claimed is:

1. A drive apparatus, comprising:
a first controller configured to generate and output a data control synchronization signal after being energized, wherein the data control synchronization signal is configured to control whether to load a data voltage onto a data line in a touch display panel to be connected; and
a second controller connected with the first controller, and the second controller is configured to directly output a first set level signal and a second set level signal before being energized;
wherein the first set level signal is configured to control a selection of a display drive mode from a plurality of drive modes supported by the touch display panel to be connected; and
the second set level signal is configured to control a output of a drive signal corresponding to the display drive mode for the touch display panel to be connected.

2. The drive apparatus according to claim 1 , wherein in the case that a level of the data control synchronization signal is a first level, the data voltage is controlled to be loaded onto the data line in the touch display panel to be connected; and
in the case that a level of the data control synchronization signal is a second level, the data voltage is controlled to be stopped from being loaded onto the data line in the touch display panel to be connected.

3. The drive apparatus according to claim 2 , wherein the data control synchronization signal is a clock signal.

4. The drive apparatus according to claim 1 , wherein the first controller is further configured to generate and output a clock control synchronization signal after being energized; and
the second controller is further configured to receive the clock control synchronization signal after being energized, and generate and output a mode enablement signal and a drive control synchronization signal according to the clock control synchronization signal;
wherein the mode enablement signal is configured to control a selection of a target drive mode from the plurality of drive modes; and
the drive control synchronization signal is configured to control a output of a drive signal corresponding to the target drive mode for the touch display panel to be connected.

5. The drive apparatus according to claim 4 , wherein the first controller is further configured to generate the data control synchronization signal according to the clock control synchronization signal.

6. The drive apparatus according to claim 4 , wherein the first controller is further configured to generate the clock control synchronization signal and the data control synchronization signal simultaneously.

7. The drive apparatus according to claim 4 , wherein the data control synchronization signal has a same timing as the clock control synchronization signal.

8. The drive apparatus according to claim 4 , wherein the drive control synchronization signal is the clock signal;
duration of a first level in one clock cycle of the clock control synchronization signal is within duration of a first level in one clock cycle of the drive control synchronization signal; and
duration of a second level in one clock cycle of the drive control synchronization signal is within duration of a second level in one clock cycle of the clock control synchronization signal.

9. The drive apparatus according to claim 1 , wherein the first controller comprises a timing controller and a first conversion resistor;
a first timing pin of the timing controller is coupled with a first end of the first conversion resistor, and a second end of the first conversion resistor is configured to output the data control synchronization signal; and
the timing controller is configured to generate the data control synchronization signal after being energized, and output the data control synchronization signal through the second end of the first conversion resistor.

10. The drive apparatus according to claim 9 , wherein the timing controller is further configured to generate the clock control synchronization signal after being energized, and output the clock control synchronization signal through the first timing pin.

11. The drive apparatus according to claim 1 , wherein the second controller comprises a microprocessor; and
the microprocessor is configured to directly output the first set level signal through a first processing pin and output the second set level signal through a second processing pin before being energized.

12. The drive apparatus according to claim 11 , wherein the microprocessor is further configured to receive the clock control synchronization signal through a third processing pin, generate the mode enablement signal and the drive control synchronization signal according to the clock control synchronization signal, output the mode enablement signal through the first processing pin, and output the drive control synchronization signal through the second processing pin after being energized.

13. The drive apparatus according to claim 1 , wherein the drive apparatus further comprises a touch and display drive circuit; a first drive pin of the touch and display drive circuit is connected with the first processing pin of the microprocessor in the second controller, and a second drive pin of the touch and display drive circuit is connected with the second processing pin of the microprocessor in the second controller; and
the touch and display drive circuit is configured to store the plurality of drive modes supported by the touch display panel, receive the first set level signal through the first drive pin, receive the second set level signal through the second drive pin, select the display drive mode from the plurality of stored drive modes according to the first set level signal, and output, through a third drive pin, the drive signal corresponding to the display drive mode to the touch display panel to be connected according to the second set level signal.

14. The drive apparatus according to claim 13 , wherein the touch and display drive circuit is further configured to receive the mode enablement signal through the first drive pin, receive the drive control synchronization signal through the second drive pin, select the target drive mode from the plurality of stored drive modes according to the mode enablement signal, and output, through the third drive pin, the drive signal corresponding to the target drive mode to the touch display panel to be connected according to the drive control synchronization signal.

15. The drive apparatus according to claim 1 , wherein the drive apparatus further comprises a level shift circuit, and the level shift circuit is connected with the first controller;
the first controller is further configured to output a scan control enablement signal after being energized; and
the level shift circuit is configured to receive the scan control enablement signal and output a scan clock signal according to the scan control enablement signal;
wherein the scan clock signal is configured to load a gate scan signal onto a gate line in the touch display panel to be connected.

16. A display apparatus, comprising:
a touch display panel comprising a touch electrode, a data line and a source drive circuit connected with the data line; and
the drive apparatus according to claim 1 ; wherein
the first controller is connected with the source drive circuit, and the source drive circuit is configured to receive the data control synchronization signal and control whether to load the data voltage onto a connected data line according to the data control synchronization signal; and
the second controller is connected with

Assignees

• Chongqing Boe Optoelectronics Tech Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Wang Bo
• Dang Kangpeng
• Chen Hong
• Gao Ming
• Guo Xiong
• Li Kuan
• Luo Zhongli
• Pu Xingyu
• Tang Yuansheng
• Xu Hebing
• Zuo Cheng
• Zheng Yaokun

Classifications

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2310/0289

  Details of voltage level shifters arranged for use in a driving circuit · CPC title

• G09G3/3677 Primary

  suitable for active matrices only · CPC title

• G09G3/3266

  Details of drivers for scan electrodes · CPC title

• G09G3/20

  for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title