Guest time scaling for a virtual machine in a virtualized computer system

US12248799B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12248799-B2
Application numberUS-202117553607-A
CountryUS
Kind codeB2
Filing dateDec 16, 2021
Priority dateDec 16, 2021
Publication dateMar 11, 2025
Grant dateMar 11, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An example method of managing guest time for a virtual machine (VM) supported by a hypervisor of a virtualized host computer includes: configuring, by the hypervisor, a central processing unit (CPU) of the host computer to trap, to the hypervisor, access by guest code in the VM to a physical counter and timer of the CPU; configuring, by the hypervisor, the guest code in the VM to use the physical counter and timer of the CPU rather than a virtual counter and timer of the CPU; trapping, at the hypervisor, an access to the physical counter and timer by the guest code; and executing, by the hypervisor, the access to the physical counter and timer on behalf of the guest code while compensating for an adjustment of a system count of the physical counter and timer to maintain the guest time as scaled with respect to frequency of the physical counter and timer.

First claim

Opening claim text (preview).

We claim: 1. A method of managing guest time for a virtual machine (VM) supported by a hypervisor of a virtualized host computer, the method comprising: configuring, by the hypervisor, a central processing unit (CPU) of the host computer to trap, to the hypervisor, access by guest code in the VM to a physical counter and timer of the CPU; configuring, by the hypervisor, the guest code in the VM to use the physical counter and timer of the CPU rather than a virtual counter and timer of the CPU by masking, a device tree presented to the guest code by the hypervisor, presence of the virtual counter and timer in the CPU; trapping, at the hypervisor, an access to the physical counter and timer by the guest code; and executing, by the hypervisor, the access to the physical counter and timer on behalf of the guest code while compensating for an adjustment of a system count of the physical counter and timer to maintain the guest time as scaled with respect to frequency of the physical counter and timer. 2. The method of claim 1 , wherein the access to the physical counter and timer by the guest code comprises an instruction to read a system counter register of the physical counter and timer, the system counter register storing the system count, and wherein the step of executing comprises: reading, by the hypervisor, the system count from the system count register; scaling the system count based on scale factors associated with the VM to generate a scaled system count; and returning the scaled system count to the guest code. 3. The method of claim 2 , wherein the step of executing further comprises: offsetting the system count prior to scaling using a virtual offset. 4. The method of claim 1 , wherein the access to the physical counter and timer by the guest code comprises an instruction to write to physical timer register of the physical counter and timer, and wherein the step of executing comprises: reverse scaling a value to be written to the physical timer register based on scale factors associated with the VM to generate an unscaled value; and writing the unscaled value to the physical timer register. 5. The method of claim 4 , wherein the step of executing further comprises: subtracting, prior to the reverse scaling, a virtual offset from the value. 6. The method of claim 1 , wherein the guest code executes at a user privilege level or a supervisor privilege level of the CPU, wherein the hypervisor executes at a hypervisor privilege level more privileged than the user privilege level and the supervisor privilege level, and wherein the access by the guest code to the physical counter and timer generates an exception from the user privilege level or the supervisor privilege level to the hypervisor privilege level, the hypervisor executing a handler in response to the exception, the handler performing the step of executing. 7. A non-transitory computer readable medium comprising instructions to be executed in a computing device to cause the computing device to carry out a method of managing guest time for a virtual machine (VM) supported by a hypervisor of a virtualized host computer, the method comprising: configuring, by the hypervisor, a central processing unit (CPU) of the host computer to trap, to the hypervisor, access by guest code in the VM to a physical counter and timer of the CPU; configuring, by the hypervisor, the guest code in the VM to use the physical counter and timer of the CPU rather than a virtual counter and timer of the CPU by masking, a device tree presented to the guest code by the hypervisor, presence of the virtual counter and timer in the CPU; trapping, at the hypervisor, an access to the physical counter and timer by the guest code; and executing, by the hypervisor, the access to the physical counter and timer on behalf of the guest code while compensating for an adjustment of a system count of the physical counter and timer to maintain the guest time as scaled with respect to frequency of the physical counter and timer. 8. The non-transitory computer readable medium of claim 7 , wherein the access to the physical counter and timer by the guest code comprises an instruction to read a system counter register of the physical counter and timer, the system counter register storing the system count, and wherein the step of executing comprises: reading, by the hypervisor, the system count from the system count register; scaling the system count based on scale factors associated with the VM to generate a scaled system count; and returning the scaled system count to the guest code. 9. The non-transitory computer readable medium of claim 8 , wherein the step of executing further comprises: offsetting the system count prior to scaling using a virtual offset. 10. The non-transitory computer readable medium of claim 7 , wherein the access to the physical counter and timer by the guest code comprises an instruction to write to physical timer register of the physical counter and timer, and wherein the step of executing comprises: reverse scaling a value to be written to the physical timer register based on scale factors associated with the VM to generate an unscaled value; and writing the unscaled value to the physical timer register. 11. The non-transitory computer readable medium of claim 10 , wherein the step of executing further comprises: subtracting, prior to the reverse scaling, a virtual offset from the value. 12. The non-transitory computer readable medium of claim 7 , wherein the guest code executes at a user privilege level or a supervisor privilege level of the CPU, wherein the hypervisor executes at a hypervisor privilege level more privileged than the user privilege level and the supervisor privilege level, and wherein the access by the guest code to the physical counter and timer generates an exception from the user privilege level or the supervisor privilege level to the hypervisor privilege level, the hypervisor executing a handler in response to the exception, the handler performing the step of executing. 13. A virtualized computer system, comprising: a hardware platform including a central processing unit (CPU), the CPU having a physical counter and timer and a virtual counter and timer; and a software platform including a hypervisor executing on the hardware platform and a virtual machine (VM) supported by the hypervisor, the VM executing guest code, the hypervisor configured to: configure the CPU to trap, to the hypervisor, access by the guest code in the VM to the physical counter and timer; configure the guest code in the VM to use the physical counter and timer of the CPU rather than the virtual counter and timer of the CPU by masking, a device tree presented to the guest code by the hypervisor, presence of the virtual counter and timer in the CPU; trap an access to the physical counter and timer by the guest code; and execute the access to the physical counter and timer on behalf of the guest code while compensating for an adjustment of a system count of the physical counter and timer to maintain a guest time for the VM as scaled with respect to frequency of the physical counter and timer. 14. The virtualized computer system of claim 13 , wherein the access to the physical counter and timer by the guest code comprises an instruction to read a system counter register of the physical counter and timer, the system counter register storing the system count, and wherein the hypervisor is configured to: read the system count from the system count register; scale the system count based on scale factors associated with the VM to generate a scaled system count; and return t

Assignees

Inventors

Classifications

  • Memory management, e.g. access or allocation · CPC title

  • Generating or distributing clock signals or signals derived directly therefrom · CPC title

  • Hypervisor-specific management and integration aspects · CPC title

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What does patent US12248799B2 cover?
An example method of managing guest time for a virtual machine (VM) supported by a hypervisor of a virtualized host computer includes: configuring, by the hypervisor, a central processing unit (CPU) of the host computer to trap, to the hypervisor, access by guest code in the VM to a physical counter and timer of the CPU; configuring, by the hypervisor, the guest code in the VM to use the physic…
Who is the assignee on this patent?
Vmware Inc, VMware LLC
What technology area does this patent fall under?
Primary CPC classification G06F9/45558. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 11 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).