Display panel and display device having detection circuit and light-emitting device

Patent metadata

Field	Value
Publication number	US-12245463-B2
Application number	US-202117637772-A
Country	US
Kind code	B2
Filing date	Feb 2, 2021
Priority date	Mar 27, 2020
Publication date	Mar 4, 2025
Grant date	Mar 4, 2025

Abstract

Disclosed are a display panel and a display device. The display panel includes: a base substrate; a detection circuit, located on the side of the base substrate, and including a transistor and a photosensitive detection component electrically connected to the transistor, and an orthographic projection of the transistor on the base substrate and an orthographic projection of the photosensitive detection component on the base substrate do not overlap with each other; a planarization layer, located on the side of the detection circuit facing away from the base substrate, and including a first surface facing away from the base substrate at the position in which the transistor is located, and a second surface facing away from the base substrate at the position in which the photosensitive detection component is located; and a light-emitting device, located on the side of the planarization layer away from the detection circuit.

First claim

What is claimed is:

1. A display panel, comprising:
a base substrate;
a detection circuit, located on a side of the base substrate, and comprising a transistor and photosensitive detection components electrically connected to the transistor, wherein an orthographic projection of the transistor on the base substrate and an orthographic projection of each of the photosensitive detection components on the base substrate do not overlap with each other;
a planarization layer, located on a side of the detection circuit facing away from the base substrate, and comprising: a first surface facing away from the base substrate at a position where the transistor is located, and a second surface facing away from the base substrate at a position where each of the photosensitive detection components is located, wherein the first surface and the second surface are located on a same plane;
light-emitting devices, located on a side of the planarization layer facing away from the detection circuit; and
a pixel circuit, electrically connected to the light-emitting devices, wherein an orthographic projection of the pixel circuit on the base substrate, an orthographic projection of each of the light-emitting devices on the base substrate, and an orthographic projection of the detection circuit on the base substrate do not overlap with each other.

2. The display panel of claim 1 , wherein at least two of the light-emitting devices share one of the photosensitive detection components, and each of the at least two of the light-emitting devices sharing the same photosensitive detection component has an overlapping area with the photosensitive detection component;
at least two of the photosensitive detection components are electrically connected to the transistor.

3. The display panel of claim 2 , wherein every four of the at least two of the light-emitting devices share one of the photosensitive detection components, the four of the at least two of the light-emitting devices are located in two adjacent rows and two adjacent columns, and the one of the photosensitive detection components is located at a center of a quadrangle formed by centers of the four of the at least two of the light-emitting devices.

4. The display panel of claim 3 , wherein two of the at least two of the photosensitive detection components are connected to the transistor, and the transistor is located between two adjacent photosensitive detection components between two adjacent rows of the light-emitting devices.

5. The display panel of claim 4 , wherein each of the photosensitive detection components comprises: a first detection electrode, a photosensitive film layer located on a side of the first detection electrode facing away from the base substrate, and a second detection electrode located on a side of the photosensitive film layer facing away from the first detection electrode;
the transistor comprises a source and drain layer located on a side of the base substrate, and the first detection electrode is located in the source and drain layer.

6. The display panel of claim 5 , wherein the transistor comprises: a gate layer located between the base substrate and the source and drain layer, and an interlayer dielectric layer located between the gate layer and the source and drain layer;
the gate layer comprises: a first gate line located between two adjacent rows of the light-emitting devices and extending in a first direction, and a first bridging electrode located between two adjacent rows of the light-emitting devices, wherein an orthographic projection of the first bridging electrode on the base substrate has an overlap area with each of first detection electrodes of the two of the least two of the photosensitive detection components sharing the same transistor;
two of the first detection electrodes are electrically connected to the same first bridging electrode through first-type via holes penetrating the interlayer dielectric layer, and electrically connected to a source electrode in the source and drain layer of the transistor through a second-type via hole penetrating the interlayer dielectric layer through the first bridging electrode.

7. The display panel of claim 6 , wherein the first bridging electrode comprises: a first main branch extending in the first direction, and two first branches that are connected to two ends of the first main branch respectively and extend perpendicular to the first direction and towards a side facing away from the first gate line;
the first bridging electrode is electrically connected to the first detection electrode through the first-type via holes at the first branches, and electrically connected to the source electrode through the second-type via hole at middle of the first main branch.

8. The display panel of claim 7 , wherein the source and drain layer further comprises: a first light detection signal line located between two adjacent photosensitive detection components and extending perpendicular to the first direction, wherein the first light detection signal line is multiplexed as a drain electrode of the transistor.

9. The display panel of claim 8 , wherein the gate layer further comprises a second gate line extending in the first direction and providing a pixel scan signal to the light-emitting device.

10. The display panel of claim 6 , wherein the gate layer further comprises: a second light detection signal line having a same extension direction as the first gate line and located on a side of the first gate line facing away from the first bridging electrode.

11. The display panel of claim 10 , wherein the source and drain layer further comprises: a transition electrode; each of the light-emitting devices comprises: a pixel electrode layer, the pixel electrode layer comprising: a pixel electrode and a second bridging electrode; the display panel further comprises: a passivation layer located between the second detection electrode and the planarization layer, wherein the passivation layer contacts and covers the source and drain layer of the transistor, and contacts and covers the second detection electrode of each of the photosensitive detection components;
an orthographic projection of the second bridging electrode on the base substrate has an overlap area with each of second detection electrodes of the two of the at least two of the photosensitive detection components sharing the same transistor; and two of the second detection electrodes are electrically connected to the same second bridging electrode through third-type via holes penetrating the planarization layer and the passivation layer, electrically connected to the transition electrode through a fourth-type via hole penetrating the planarization layer and the passivation layer through the second bridging electrode, and electrically connected to the second light detection signal line through a fifth-type via hole penetrating the interlayer dielectric layer through the transition electrode.

12. The display panel of claim 11 , wherein the second bridging electrode comprises a second main branch extending in the first direction and a second branch extending perpendicular to the first direction from a middle portion of the second main branch, wherein: in a direction perpendicular to the base substrate, an orthographic projection of the second main branch is located between an orthographic projection of the first gate line and an orthographic projection of the second light detection signal line, and an orthographic projection of the second branch is located on a side of the orthographic projection of the second main branch facing away from the first gate line;
the second bridging electrode is electrically connected to the secon

Assignees

• Boe Technology Group Co Ltd

Inventors

• Han Ying
• Wang Ling
• Lin Yicheng
• Xu Pan
• Wang Guoying
• Zhang Xing

Classifications

• H10K59/131

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10K59/126

  Shielding, e.g. light-blocking means over the TFTs · CPC title

• H10K59/60 Primary

  OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes · CPC title

• H10K59/1213 Primary

  the pixel elements being TFTs · CPC title

• H10K59/00

  Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00 · CPC title