Semiconductor device

Patent metadata

Field	Value
Publication number	US-12243795-B2
Application number	US-202217719949-A
Country	US
Kind code	B2
Filing date	Apr 13, 2022
Priority date	Jul 5, 2021
Publication date	Mar 4, 2025
Grant date	Mar 4, 2025

Abstract

In a semiconductor device according to the technology disclosed in the present specification, a temperature detection region is provided with a diffusion layer of a second conductivity type provided on a surface layer of a drift layer of a first conductivity type, a well layer of a first conductivity type provided on a surface layer of the diffusion layer and electrically connected to an anode electrode, and a cathode layer of a first conductivity type provided on a surface layer of the well layer and electrically connected to a cathode electrode.

First claim

What is claimed is:

1. A semiconductor device comprising:
a temperature detection region;
a switching element region that at least partially surrounds the temperature detection region in plan view; and
a signal pad region,
wherein the temperature detection region is provided with a diffusion layer of a second conductivity type provided on a surface layer of a drift layer of a first conductivity type, a well layer of the first conductivity type provided on a surface layer of the diffusion layer and electrically connected to an anode electrode, and a cathode layer of the first conductivity type provided on a surface layer of the well layer and electrically connected to a cathode electrode,
the cathode layer has a higher impurity concentration than the well layer,
the switching element region is provided with a base layer of the second conductivity type provided on a surface layer of a semiconductor layer of the first conductivity type, a source layer of the first conductivity type provided partially on a surface layer of the base layer, a plurality of trenches provided from an upper surface of the base layer to an inside of the semiconductor layer, and a plurality of gate electrodes each provided to be surrounded by a gate insulating film in one of the plurality of trenches, and
the signal pad region is provided with an anode pad electrically connected to the anode electrode and a cathode pad electrically connected to the cathode electrode.

2. The semiconductor device according to claim 1 , wherein, in a Schottky junction portion where the well layer and the anode electrode are in contact with each other in the temperature detection region, an anode layer of the second conductivity type is further provided at an end portion of the Schottky junction portion in plan view.

3. The semiconductor device according to claim 2 , wherein
the source layer is electrically connected to an emitter electrode in the switching element region, and
the diffusion layer is connected to the emitter electrode in the temperature detection region.

4. The semiconductor device according to claim 2 , further comprising a diode region provided adjacent to the switching element region,
wherein the temperature detection region is provided to be surrounded by the switching element region.

5. The semiconductor device according to claim 2 , further comprising a diode region that surrounds the temperature detection region in plan view,
wherein the switching element region at least partially surrounds the diode region.

6. The semiconductor device according to claim 1 , wherein
the source layer is electrically connected to an emitter electrode in the switching element region, and
the diffusion layer is connected to the emitter electrode in the temperature detection region.

7. The semiconductor device according to claim 6 , further comprising a diode region provided adjacent to the switching element region,
wherein the temperature detection region is provided to be surrounded by the switching element region.

8. The semiconductor device according to claim 6 , further comprising a diode region that surrounds the temperature detection region in plan view,
wherein the switching element region at least partially surrounds the diode region.

9. The semiconductor device according to claim 1 , further comprising a diode region provided adjacent to the switching element region,
wherein the temperature detection region is provided to be surrounded by the switching element region.

10. The semiconductor device according to claim 1 , further comprising a diode region that surrounds the temperature detection region in plan view,
wherein the switching element region at least partially surrounds the diode region.

11. The semiconductor device according to claim 1 , wherein the well layer is directly connected to the anode electrode.

12. The semiconductor device according to claim 1 , wherein the cathode layer is directly connected to the cathode electrode.

13. The semiconductor device according to claim 1 , wherein the well layer and the cathode layer constitute a Schottky diode.

14. The semiconductor device according to claim 13 , wherein a Schottky junction is present between the well layer and the anode electrode.

15. The semiconductor device according to claim 1 , wherein the anode electrode and the cathode electrode are provided on a same side of the semiconductor device.

16. The semiconductor device according to claim 1 , wherein the signal pad region is provided outside of the temperature detection region and the switching element region in plan view.

Assignees

• Mitsubishi Electric Corp

Inventors

• Soneda Shinya
• Furukawa Akihiko

Classifications

• H10W40/00 Primary

  Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60) · CPC title

• H10D84/617

  Combinations of vertical BJTs and only diodes · CPC title

• H10D62/393

  Body regions of DMOS transistors or IGBTs  (cell layout of DMOS H10D62/127) · CPC title

• H10D12/481

  having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs · CPC title

• H10D8/60

  Schottky-barrier diodes · CPC title