Micro light-emitting display apparatus and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-12237365-B2
Application number	US-202318456069-A
Country	US
Kind code	B2
Filing date	Aug 25, 2023
Priority date	Oct 5, 2020
Publication date	Feb 25, 2025
Grant date	Feb 25, 2025

Abstract

A micro light-emitting display apparatus and a method of manufacturing the same are disclosed The micro light-emitting display apparatus includes a first semiconductor layer, an isolation structure provided on the first semiconductor layer and configured to define a plurality of sub-pixels each configured to emit light, a first light-emitting unit including a first active layer provided in a first sub-pixel among the plurality of sub-pixels, and a second semiconductor layer provided on the first active layer, and a second light-emitting unit including a rod semiconductor layer provided in a second sub-pixel among the plurality of sub-pixels, a second active layer provided on the rod semiconductor layer, and a third semiconductor layer provided on the second active layer. The first active layer is configured to emit blue light and the second active layer is configured to emit green light.

First claim

What is claimed is:

1. A method of manufacturing a micro light-emitting display apparatus, the method comprising:
forming a first active layer on a first semiconductor layer;
forming a second semiconductor layer on the first active layer;
forming a first isolation structure and a second isolation structure in the first active layers, the first isolation structure having a first width and the second isolation structure having a second width greater than the first width;
forming a first layer on the first active layer, the first isolation structure, and the second isolation structure;
exposing a first area of the second isolation structure;
forming a regrowth area by etching the exposed first area of the second isolation structure;
regrowing a semiconductor layer in the regrowth area;
planarizing the semiconductor layer to form a rod semiconductor layer;
forming a second active layer on the rod semiconductor layer; and
forming a third semiconductor layer on the second active layer.

2. The method of claim 1 , wherein, in the planarizing of the semiconductor layer, an etching solution including potassium hydroxide (KOH) or tetramethyl ammonium hydroxide (TMAH) is used.

3. The method of claim 1 , wherein the rod semiconductor layer comprises a first portion having a constant width viewed along a height direction and a second portion where the width changes viewed along the height direction, wherein the second portion may include a first inclined surface, a second inclined surface facing the first inclined surface, and an upper surface between the first inclined surface and the second inclined surface.

4. The method of claim 3 , wherein an angle between a surface extending from the first inclined surface and the upper surface ranges from about 47 degrees to about 57 degrees.

5. The method of claim 3 , wherein a width D 1 of the upper surface satisfies the following equation: D 1 =D−2×(h 1 /tan β), where h 1 is a height of the second portion, β is an angle between the surface extending from the first inclined surface and the upper surface and D is a width of the first portion.

6. The method of claim 3 , wherein an aspect ratio (H/D) of the first portion satisfies 0.05<H/D<20, where H is a height of the first portion and D is a width of the first portion.

7. The method of claim 6 , wherein the height H of the first portion satisfies 0.5 μm<H<20 μm.

8. The method of claim 5 , wherein the height h 1 of the second portion is about 100 nm or less.

9. The method of claim 1 , wherein the display apparatus further includes a third light-emitting unit configured to emit red light.

10. The method of claim 9 , wherein the third light-emitting unit comprises a plurality of nanorod semiconductor layers arranged apart from each other on the first semiconductor layer, a third active layer, among a plurality of third active layers, provided on each of the plurality of nanorod semiconductor layers, and a fourth semiconductor layer, among a plurality of fourth semiconductor layer, provided on each of the third active layers.

11. The method of claim 10 , wherein each of the nanorod semiconductor layers and each of the third active layers have a width in a range of about 10 nm to about 100 nm.

12. The method of claim 10 , wherein a pitch between the nanorod semiconductor layers is in a range of about 20 nm to about 300 nm.

13. A method of manufacturing a micro light-emitting display apparatus, the method comprising:
forming a first active layer on a first semiconductor layer;
forming a second semiconductor layer on the first active layer;
forming an isolation structure in the first active layer and the second semiconductor layer;
etching an upper surface of the isolation structure to form an opening;
forming a rod semiconductor layer in the opening;
forming a second active layer on the rod semiconductor layer; and
forming a third semiconductor layer on the second active layer.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Choi Junhee
• Kong Kiho
• Kim Nakhyun
• Kim Dongho
• Park Junghun
• Park Jinjoo
• Lee Eunsung
• Han Joohun

Classifications

• H10D86/40

  characterised by multiple TFTs · CPC title

• H10H20/819

  characterised by their shape, e.g. curved or truncated substrates · CPC title

• H10H20/01

  Manufacture or treatment · CPC title

• H10H20/821

  of the light-emitting regions, e.g. non-planar junctions · CPC title

• H10H20/815

  having stress relaxation structures, e.g. buffer layers · CPC title