Systems and methods for selectively controlling programming operations of a memory system comprising a plurality of super blocks

US12236116B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12236116-B2
Application numberUS-202217868147-A
CountryUS
Kind codeB2
Filing dateJul 19, 2022
Priority dateDec 10, 2021
Publication dateFeb 25, 2025
Grant dateFeb 25, 2025

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A memory system includes a memory controller and a memory device including a plurality of dies, each die including a plurality of blocks. A plurality of commands are configured to control the memory device in units of super blocks. During a first time interval, a first erase operation is performed on a first-first block among the first-first block to a first-Mth block, and a first program operation is performed on a second-first block to a second-Mth block, based on the first commands. During a second time interval, a second erase operation is performed on a first-second block among the first-first block to the first-Mth block, and a second program operation is performed on the first-first block and one or more blocks among the second-first block to the second-Mth block, based on the second commands.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of operating a memory system comprising a memory controller and a memory device, the memory device comprising a plurality of dies each of which includes a plurality of blocks, the method comprising: executing, by at least one of the memory controller or the memory device, operations comprising: outputting a plurality of commands comprising first and second commands based on a program request and program data, wherein the plurality of commands are configured to control the memory device in units of super blocks, the super blocks comprising blocks included in different dies of the plurality of dies; during a first time interval, performing, based on the first commands, a first erase operation on a first-first block among the first-first block to a first-Mth block of the blocks included in a first super block among the super blocks, where M is an integer greater than or equal to two; during the first time interval, performing, based on the first commands, a first program operation on a second-first block to a second-Mth block of the blocks included in a second super block among the super blocks; during a second time interval after the first time interval, performing, based on the second commands, a second erase operation on a first-second block among the first-first block to the first-Mth block; during the second time interval, performing, based on the second commands, a second program operation on the first-first block and one or more blocks among the second-first block to the second-Mth block; and during each time interval from among a plurality of consecutive time intervals that are after the second time interval, performing an additional respective erase operation on at least one of the blocks included in the first super block and, while performing the additional respective erase operation, performing an additional respective program operation on at least one of the blocks included in the second super block, wherein no intervening time intervals are present between each consecutive pair of the plurality of consecutive time intervals, and wherein the first time interval is equal to an amount time required to complete the first erase operation and complete the first program operation, wherein the second time interval is equal to an amount time required to complete the second erase operation and is less than an amount of time required to complete the second program operation, and wherein each of the plurality of consecutive time intervals is equal to an amount of time required to complete the additional respective erase operation and is less than an amount of time required to complete the additional respective program operation on each of the at least one of the blocks included in the second super block. 2. The method of claim 1 , wherein: during the first time interval, the first-first block to the first-Mth block are grouped in the first super block, and the second-first block to the second-Mth block are grouped in the second super block, and during the second time interval, the first-second block to the first-Mth block are grouped in the first super block, and the first-first block and the one or more blocks among the second-first block to the second-Mth block are grouped in the second super block. 3. The method of claim 2 , wherein: during the second time interval, one or more of the blocks among the second-first block to the second-Mth block are not included in the second super block. 4. The method of claim 1 , further comprising: during a third time interval from among the plurality of consecutive time intervals, performing, based on third commands of the plurality of commands, a third erase operation on a first-third block among the first-first block to the first-Mth block; and during the third time interval, performing, based on the third commands, a third program operation on the first-first block, the first-second block, and one or more blocks among the second-first block to the second-Mth block. 5. The method of claim 4 , wherein: during the third time interval, the first-third block to the first-Mth block are grouped in the first super block, and the first-first block, the first-second block, and the one or more blocks among the second-first block to the second-Mth block are grouped in the second super block. 6. The method of claim 5 , wherein: during the third time interval, two or more blocks among the second-first block to the second-Mth block are not included in the second super block. 7. The method of claim 1 , wherein outputting the plurality of commands comprises: generating program scheduling information representing the blocks to be grouped in the first super block and the second super block among the plurality of blocks during each of the first time interval and the second time interval; and generating the plurality of commands based on the program scheduling information. 8. The method of claim 7 , wherein generating the program scheduling information comprises: determining the first time interval and the second time interval based on a size of the program data and a number of bits of first data that is stored in each of a plurality of memory cells included in the plurality of blocks; and determining the first super block and the second super block based on the size of the program data, the number of bits of the first data, the first time interval, and the second time interval. 9. The method of claim 8 , wherein generating the plurality of commands comprises: storing commands corresponding to the first super block among the plurality of commands in a first command queue among a plurality of command queues; and storing commands corresponding to the second super block among the plurality of commands in a second command queue among the plurality of command queues. 10. The method of claim 1 , wherein performing the second program operation comprises: based on the second commands, at a first time point at which a predetermined time has elapsed from a second time point, initiating the second program operation on the first-first block, wherein the second time point represents a time point at which the first erase operation on the first-first block is completed within the first time interval. 11. The method of claim 1 , wherein, during the second time interval, the second commands are output sequentially with respect to the blocks included in the second super block. 12. The method of claim 1 , wherein the first super block includes invalid blocks. 13. The method of claim 1 , wherein outputting the plurality of commands comprises: generating program scheduling information representing the blocks to be grouped in the first super block and the second super block among the plurality of blocks during each of the first time interval and the second time interval; and generating the plurality of commands based on the program scheduling information, wherein the program scheduling information further represents a time point at which each of the second commands is issued to the memory device. 14. A memory system comprising: a memory device comprising a plurality of dies, each of which includes a plurality of blocks; and a memory controller configured to control the memory device, wherein the memory controller is configured to output a plurality of commands comprising first and second commands based on a program request and program data, the plurality of commands are configured to control the memory device in units of super blocks, and the super blocks comprise blocks included in different dies of the plurality of dies, wherein the memory device is configured to

Assignees

Inventors

Classifications

  • in relation to life time, e.g. increasing Mean Time Between Failures [MTBF] · CPC title

  • Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

  • Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

  • Programming or data input circuits · CPC title

  • in block erasable memory, e.g. flash memory · CPC title

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What does patent US12236116B2 cover?
A memory system includes a memory controller and a memory device including a plurality of dies, each die including a plurality of blocks. A plurality of commands are configured to control the memory device in units of super blocks. During a first time interval, a first erase operation is performed on a first-first block among the first-first block to a first-Mth block, and a first program opera…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F3/064. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 25 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).