Pixel driving circuit, driving method thereof and display panel

Patent metadata

Field	Value
Publication number	US-12223894-B2
Application number	US-202117913428-A
Country	US
Kind code	B2
Filing date	Oct 29, 2021
Priority date	Mar 24, 2021
Publication date	Feb 11, 2025
Grant date	Feb 11, 2025

Abstract

A pixel driving circuit, a driving method thereof and a display panel are provided. The pixel driving circuit includes a driving transistor, a capacitor having two terminals connected to a first power terminal and a gate electrode of the driving transistor, and a light emitting device. The pixel driving circuit includes: a reset module; a data writing module; a threshold compensation module including a compensation transistor configured to electrically connect second and gate electrodes of the driving transistor together in the data writing phase; a light emitting control module including a first gating transistor configured to electrically connect the second electrode of the driving transistor and the light emitting device in the reset phase and disconnect the second electrode from the light emitting device in the data writing phase. The compensation transistor and the first gating transistor are oxide transistors, and the driving transistor is a low-temperature polysilicon transistor.

First claim

What is claimed is:

1. A pixel driving circuit, comprising a driving transistor, a capacitor and a light emitting device, wherein both terminals of the capacitor are connected to a first power terminal and a gate electrode of the driving transistor, respectively, wherein the pixel driving circuit further comprises:
a reset module configured to transmit a signal at an initialization voltage terminal to the gate electrode of the driving transistor and a first terminal of the light emitting device in a reset phase, to initialize potentials at the gate electrode of the driving transistor and the first terminal of the light emitting device;
a data writing module configured to write a data signal at a data writing terminal into a first electrode of the driving transistor in a data writing phase;
a threshold compensation module comprising a compensation transistor, which is configured to electrically connect a second electrode and the gate electrode of the driving transistor together in the data writing phase; and
a light emitting control module comprising a first gating transistor and configured to disconnect the first power terminal from the first electrode of the driving transistor in the reset phase and the data writing phase; wherein the first gating transistor is configured to electrically connect the second electrode of the driving transistor and the light emitting device in the reset phase and disconnect the second electrode of the driving transistor from the light emitting device in the data writing phase; the light emitting control module is configured to electrically connect the first power terminal and the first electrode of the driving transistor and electrically connect the second electrode of the driving transistor and the light emitting device in a light emitting phase; and
wherein the compensation transistor is an oxide transistor, the driving transistor is a low-temperature polysilicon transistor, and the first gating transistor is an oxide transistor;
wherein a first electrode of the first gating transistor is connected to the second electrode of the driving transistor, and a second electrode of the first gating transistor is connected to the first terminal of the light emitting device;
the data writing module comprises a writing transistor; and
a gate electrode of the first gating transistor and a gate electrode of the writing transistor are connected to a scan signal terminal, a first electrode of the writing transistor is connected to the data writing terminal, and a second electrode of the writing transistor is connected to the first electrode of the driving transistor.

2. The pixel driving circuit according to claim 1 , wherein the light emitting control module further comprises a second gating transistor configured to disconnect the first power terminal from the first electrode of the driving transistor in the reset phase and the data writing phase, and electrically connect the first power terminal to the first electrode of the driving transistor in the light emitting phase.

3. The pixel driving circuit according to claim 2 , wherein a gate electrode of the second gating transistor is connected to a light emitting control terminal, a first electrode of the second gating transistor is connected to the first power terminal, and a second electrode of the second gating transistor is connected to the first electrode of the driving transistor.

4. The pixel driving circuit according to claim 3 , wherein a gate electrode of the compensation transistor is connected to the light emitting control terminal, a first electrode of the compensation transistor is connected to the second electrode of the driving transistor, and a second electrode of the compensation transistor is connected to the gate electrode of the driving transistor.

5. The pixel driving circuit according to claim 4 , wherein
the reset module comprises a reset transistor;
a gate electrode of the reset transistor is connected to a reset terminal, a first electrode of the reset transistor is connected to the first terminal of the light emitting device, and a second electrode of the reset transistor is connected to the initialization voltage terminal;
the second gating transistor, the writing transistor and the reset transistor are all low-temperature polysilicon transistors;
the compensation transistor and the first gating transistor are N-type transistors; and
the driving transistor, the second gating transistor, the writing transistor and the reset transistor are all P-type transistors.

6. The pixel driving circuit according to claim 5 , further comprising a substrate,
wherein the first gating transistor, the second gating transistor, the writing transistor, the reset transistor, the compensation transistor, the driving transistor, and the capacitor are on the substrate.

7. The pixel driving circuit according to claim 6 , further comprising a first insulating layer, a second insulating layer, a third insulating layer, an interlayer dielectric layer, a planarization layer, and a pixel defining layer sequentially on the substrate,
wherein an active layer of the driving transistor is between the substrate and the first insulating layer; the gate electrode of the driving transistor is on the active layer of the driving transistor and between the first insulating layer and the second insulating layer; the first electrode and the second electrode of the driving transistor are in a same layer and between the interlayer dielectric layer and the planarization layer; and
the gate electrode of the compensation transistor, the gate electrode of the first gating transistor and the gate electrode of the driving transistor are in a same layer and between the first insulating layer and the second insulating layer; an active layer of the compensation transistor and an active layer of the first gating transistor are in a same layer and between the second insulating layer and the third insulating layer; and the first electrode and the second electrode of the compensation transistor, the first electrode and the second electrode of the first gating transistor and the first electrode and the second electrode of the driving transistor are in a same layer and between the interlayer dielectric layer and the planarization layer.

8. The pixel driving circuit according to claim 7 , wherein
active layers of the second gating transistor, the writing transistor and the reset transistor are in a same layer as the active layer of the driving transistor and between the substrate and the first insulating layer;
the gate electrodes of the second gating transistor, the writing transistor and the reset transistor are in a same layer as the gate electrode of the driving transistor and between the first insulating layer and the second insulating layer; and
the first electrodes and the second electrodes of the second gating transistor, the writing transistor and the reset transistor are in a same layer as the first electrode and the second electrode of the driving transistor and between the interlayer dielectric layer and the planarization layer.

9. The pixel driving circuit according to claim 8 , wherein
the gate electrode of the writing transistor and the gate electrode of the first gating transistor are on a same first scan signal line; and/or
the gate electrode of the second gating transistor and the gate electrode of the compensation transistor are on a same light emitting signal line.

10. The pixel driving circuit according to claim 9 , wherein
the gate electrode of the reset transistor is on a reset signal line; and/or
a first plate of the capacitor is in a same layer as the gate electrode of the driving transistor, and a second plate of the capacitor is connect

Assignees

• Mianyang Boe Optoelectronics Tech Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Zhu Yawei
• Cao Xin
• Wang Zifeng
• Wang Danfeng
• Fan Haoyuan

Classifications

• G09G2320/0233

  Improving the luminance or brightness uniformity across the screen · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

• G09G2300/0819

  used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title