Maximizing system power calibration algorithm accuracy

US12222785B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12222785-B2
Application numberUS-202318159844-A
CountryUS
Kind codeB2
Filing dateJan 26, 2023
Priority dateJan 26, 2023
Publication dateFeb 11, 2025
Grant dateFeb 11, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An information handling system includes a power supply unit, a processor, and a baseboard management controller. The power supply unit includes a first energy counter configured to store first power level information associated with an amount of power supplied by the power supply unit. The processor includes a second energy counter configured to store second power level information associated with an amount of power consumed by the processor. The baseboard management controller periodically calibrates the second power level to the first power level based upon a variable calibration cycle time.

First claim

Opening claim text (preview).

What is claimed is: 1. An information handling system, comprising: a power supply unit including a first energy counter that indicates first power level information associated with an amount of power supplied by the power supply unit; a processor including a second energy counter that indicates second power level information associated with an amount of power consumed by the processor; and a baseboard management controller configured periodically calibrate the second power level to the first power level based upon a variable calibration cycle time. 2. The information handling system of claim 1 , wherein the variable calibration cycle time is determined based upon a variable calibration cycle time window. 3. The information handling system of claim 2 , wherein the variable calibration cycle time window is determined as: C=T S N , where C is the variable calibration cycle time window, T is a calibration base cycle time, S is a sample multiplier, and N is an iteration number. 4. The information handling system of claim 3 , wherein the periodic calibration is continued until the variable calibration cycle time window (C) reaches a predetermined upper limit. 5. The information handling system of claim 4 , wherein, after the variable calibration cycle time window (C) reaches the predetermined upper limit, further periodic calibration is halted until a precipitating event occurs. 6. The information handling system of claim 5 , wherein, after the precipitating event occurs, the iteration number (N) is reset, and the periodic calibration is repeated. 7. The information handling system of claim 5 , wherein the precipitating event includes an increase in the first power level. 8. The information handling system of claim 5 , wherein the precipitating event includes a configuration change to the information handling system. 9. The information handling system of claim 8 , wherein the configuration change includes one of a hardware power protection limit change, a user system power cap change, a reboot of the information handling system, and a reboot of the baseboard management controller. 10. The information handling system of claim 9 , wherein the change to the hardware power protection limit is in response to a power supply unit failure. 11. A method, comprising: providing, in a power supply unit of an information handling system, a first energy counter that indicates first power level information associated with an amount of power supplied by the power supply unit; providing a second energy counter that indicates second power level information associated with an amount of power consumed by a processor; and periodically calibrating, by a baseboard management controller of the information handling system, the second power level to the first power level based upon a variable calibration cycle time. 12. The method of claim 11 , further comprising determining the variable calibration cycle time based upon a variable calibration cycle time window. 13. The method of claim 12 , wherein the variable calibration cycle time window is determined as: C = TS N , where ⁢ C ⁢ is ⁢ the ⁢ variable ⁢ calibration ⁢ cycle ⁢ time ⁢ window , T ⁢ is ⁢ a ⁢ calibration ⁢ base ⁢ cycle ⁢ time , S ⁢ is ⁢ a ⁢ sample ⁢ multiplier , and ⁢ N ⁢ is ⁢ an ⁢ iteration ⁢ number . 14. The method of claim 13 , wherein the periodic calibration is continued until the variable calibration cycle time window (C) reaches a predetermined upper limit. 15. The method of claim 14 , wherein, after the variable calibration cycle time window (C) reaches the predetermined upper limit, further periodic calibration is halted until a precipitating event occurs. 16. The method of claim 15 , wherein, after the precipitating event occurs, the iteration number (N) is reset, and the periodic calibration is repeated. 17. The method of claim 15 , wherein the precipitating event includes an increase in the first power level. 18. The method of claim 15 , wherein the precipitating event includes a configuration change to the information handling system. 19. The method of claim 18 , wherein the configuration change includes one of a hardware power protection limit change, a user system power cap change, a reboot of the information handling system, and a reboot of the baseboard management controller. 20. An information handling system, comprising: a power supply unit including a first energy counter configured to store first power level information associated with an amount of power supplied by the power supply unit; a processor including a second energy counter configured to store second power level information associated with an amount of power consumed by the processor; a voltage regulator configured to receive power from the power supply, and to provide a regulated voltage to the processor; and a baseboard management controller configured periodically calibrate the second power level to the first power level based upon a variable calibration cycle time, wherein in calibrating the second power level, the baseboard management controller is further configured to change a conversion factor of the voltage regulator.

Assignees

Inventors

Classifications

  • Supervision thereof, e.g. detecting power-supply failure by out of limits supervision · CPC title

  • G06F1/26Primary

    Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

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What does patent US12222785B2 cover?
An information handling system includes a power supply unit, a processor, and a baseboard management controller. The power supply unit includes a first energy counter configured to store first power level information associated with an amount of power supplied by the power supply unit. The processor includes a second energy counter configured to store second power level information associated w…
Who is the assignee on this patent?
Dell Products Lp
What technology area does this patent fall under?
Primary CPC classification G06F1/26. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 11 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).