Isolation communications channel using direct demodulation and data-edge encoding

US12218645B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12218645-B2
Application numberUS-202318197407-A
CountryUS
Kind codeB2
Filing dateMay 15, 2023
Priority dateJun 1, 2021
Publication dateFeb 4, 2025
Grant dateFeb 4, 2025

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An apparatus for communicating across an isolation barrier includes a differential pair of input terminals. The apparatus includes a bandpass filter circuit configured to receive a received signal on the differential pair of input terminals and to provide a received differential signal on a differential pair of nodes. The apparatus includes a demodulator directly coupled to the bandpass filter circuit and configured to directly demodulate the received differential signal on the differential pair of nodes to provide a demodulated received signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A communication apparatus comprising: an isolation barrier between a first voltage domain and a second voltage domain; a transmitter circuit in the first voltage domain and including an oscillator circuit configured to provide an oscillating differential transmit signal for transmission across the isolation barrier; a receiver circuit in the second voltage domain and configured to receive the oscillating differential transmit signal as a received signal, the receiver circuit including a filter circuit configured to filter the received signal to provide a filtered signal, and a demodulator circuit configured to demodulate the filtered signal to provide a demodulated received signal, the filter circuit including one or more LC components that are matched to one or more LC components of the oscillator circuit. 2. The communication apparatus of claim 1 wherein the demodulator circuit includes a direct demodulator. 3. The communication apparatus of claim 2 wherein the direct demodulator is configured to demodulate the filtered signal with a delay of less than 20 ns. 4. The communication apparatus of claim 1 wherein the filter circuit is configured to amplify a first frequency band of the received signal and to attenuate a second frequency band of the received signal, a carrier signal of the received signal being in the first frequency band and common-mode transient interference of the received signal being in the second frequency band. 5. The communication apparatus of claim 1 wherein the demodulator circuit includes a differential pair of transistors. 6. The communication apparatus of claim 5 wherein the demodulator circuit further includes a reference transistor, a relative size of the reference transistor and sizes of the differential pair of transistors determining a threshold voltage of the demodulator circuit. 7. The communication apparatus of claim 6 wherein the demodulator circuit further includes a bias transistor having a first gate terminal coupled to second gate terminals of the differential pair of transistors and a third gate terminal of the reference transistor. 8. The communication apparatus of claim 6 wherein the demodulator circuit further includes: a first resistor coupled between a common node coupled to a first terminal of the reference transistor and a second terminal of a first transistor of the differential pair of transistors; and a second resistor coupled between the common node and a third terminal of a second transistor of the differential pair of transistors. 9. The communication apparatus of claim 1 further including a digital circuit configured to provide a received digital signal based on the demodulated received signal, the digital circuit configured to toggle the received digital signal to a first logic value in response to a pulse of the demodulated received signal having a first width and configured to toggle the received digital signal to a second logic value in response to a second pulse of the demodulated received signal having a second width. 10. The communication apparatus of claim 1 wherein the transmitter circuit further includes a control circuit configured to generate a transmit data signal having a first modulated pulse with a first pulse width in response to a first transition of an input data signal, and having a second modulated pulse having a second pulse width in response to a second transition of the input data signal, the first pulse width being greater than the second pulse width, the transmit data signal provided as an input to the oscillator circuit. 11. The communication apparatus of claim 10 wherein the oscillator circuit further includes an inductor configured to receive the transmit data signal. 12. A method for communicating across an isolation barrier, the method comprising: transmitting an oscillating differential transmit signal across an isolation barrier from a first voltage domain to a second voltage domain; receiving the oscillating differential transmit signal as a received signal; filtering the received signal with a filter circuit to provide a filtered signal, the filter circuit including one or more LC components that are matched to one or more LC components of an oscillator circuit that is configured to generate the oscillating differential transmit signal; and demodulating the filtered signal with a demodulator circuit to provide a demodulated received signal. 13. The method of claim 12 wherein the demodulator circuit includes a direct demodulator. 14. The method of claim 13 wherein demodulating includes demodulating the filtered signal with a delay of less than 20 ns. 15. The method of claim 12 further comprising: providing a digital signal based on the demodulated received signal; decoding a first value of the digital signal based on first pulse having a first pulse width; and decoding a second value of the digital signal based on a second pulse having a second pulse width smaller than the first pulse width. 16. The method of claim 12 further comprising: configuring a first instantiation of an LC circuit on a first integrated circuit die, the oscillator circuit including the first instantiation; and configuring a second instantiation of the LC circuit on a second integrated circuit die, the filter circuit including the second instantiation. 17. The method of claim 12 wherein transmitting the oscillating differential transmit signal across the isolation barrier includes transmitting a first modulated pulse in response to a first transition of a data signal and transmitting a second modulated pulse in response to a next transition of the data signal, the first modulated pulse having a first pulse width and the second modulated pulse having a second pulse width different from the first pulse width. 18. The method of claim 12 wherein filtering the received signal includes amplifying a first frequency band of the received signal and attenuating a second frequency band of the received signal, a carrier signal of the received signal being in the first frequency band and common-mode transient interference of the received signal being in the second frequency band. 19. The method of claim 12 wherein the demodulator circuit includes a differential pair of transistors, each transistor of the differential pair of transistors having a corresponding source terminal coupled to a corresponding node of the differential pair of nodes. 20. The method of claim 19 wherein the demodulator circuit further includes a reference transistor, a relative size of the reference transistor and sizes of the differential pair of transistors determining a threshold voltage of the demodulator circuit.

Assignees

Inventors

Classifications

  • the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair · CPC title

  • H04B1/40Primary

    Circuits · CPC title

  • Demodulation of amplitude-modulated oscillations (H03D5/00, H03D9/00, H03D11/00 take precedence) · CPC title

  • Modulators in which amplitude of carrier component in output is dependent upon strength of modulating signal, e.g. no carrier output when no modulating signal is present (H03C1/28 - H03C1/34, H03C1/46, H03C1/48 take precedence) · CPC title

  • the amplifier comprising one or more field effect transistors · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12218645B2 cover?
An apparatus for communicating across an isolation barrier includes a differential pair of input terminals. The apparatus includes a bandpass filter circuit configured to receive a received signal on the differential pair of input terminals and to provide a received differential signal on a differential pair of nodes. The apparatus includes a demodulator directly coupled to the bandpass filter …
Who is the assignee on this patent?
Skyworks Solutions Inc
What technology area does this patent fall under?
Primary CPC classification H04B1/40. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 04 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).