Display substrate and display apparatus

Patent metadata

Field	Value
Publication number	US-12217702-B2
Application number	US-202218016361-A
Country	US
Kind code	B2
Filing date	Feb 28, 2022
Priority date	Feb 28, 2022
Publication date	Feb 4, 2025
Grant date	Feb 4, 2025

Abstract

A display substrate and a display apparatus are disclosed, the display substrate includes multiple light emitting output lines connected with a light emitting drive circuit and multiple scan output lines connected with a scan drive circuit; at least one light emitting output line includes at least two light emitting output parts connected with each other, a scan output line has an integrally formed structure, or, a light emitting output line has an integrally formed structure, at least one scan output line includes at least two scan output parts connected with each other, or at least one light emitting output line includes at least two light emitting output parts connected with each other, at least one scan output line includes at least two scan output parts connected with each other; at least two light emitting output parts located on a same light emitting output line are arranged in different layers.

First claim

The invention claimed is:

1. A display substrate, comprising a display region and a non-display region, wherein the display substrate comprises a base substrate and a circuit structure layer disposed on the base substrate, the circuit structure layer comprises a plurality of pixel drive circuits arranged in an array and located in the display region, and a light emitting drive circuit, a scan drive circuit, and a control drive circuit that are located in the non-display region; the light emitting drive circuit and the scan drive circuit are located on a side of the control drive circuit away from the display region, at least one pixel drive circuit comprises: a writing transistor, a compensation reset transistor, and a light emitting transistor, the scan drive circuit is configured to provide a drive signal to the compensation reset transistor, the control drive circuit is configured to provide a drive signal to the writing transistor, the light emitting drive circuit is configured to provide a drive signal to the light emitting transistor;
the display substrate further comprises a plurality of light emitting output lines connected with the light emitting drive circuit and a plurality of scan output lines connected with the scan drive circuit;
at least one of the light emitting output lines comprises at least two light emitting output parts connected with each other, a scan output line has an integrally formed structure, or, a light emitting output line has an integrally formed structure, and at least one of the scan output lines comprises at least two scan output parts connected with each other, or at least one of the light emitting output lines comprises at least two light emitting output parts connected with each other, and at least one of the scan output lines comprises at least two scan output parts connected with each other;
wherein at least two light emitting output parts located on a same light emitting output line are arranged in different layers, and resistivities of the light emitting output parts arranged in the different layers are different, and at least two scan output parts located on a same scan output line are arranged in different layers, and resistivities of the scan output parts arranged in the different layers are different;
a pixel drive circuit comprises: a data signal terminal, a control signal terminal, a scan signal terminal, and a light emitting signal terminal; the display substrate further comprises N data signal lines, 2 M control signal lines, 2 M light emitting signal lines, and 2 M scan signal lines;
the writing transistor is electrically connected with the control signal terminal and the data signal terminal respectively, the compensation reset transistor is electrically connected with the scan signal terminal, and the light emitting transistor is electrically connected with the light emitting signal terminal;
the data signal lines extend along a first direction and the N data signal lines are arranged along a second direction, the 2 M control signal lines, the 2 M light emitting signal lines, and the 2 M scan signal lines extend along the second direction and are arranged along the first direction, wherein the first direction and the second direction intersect;
for a pixel drive circuit of an s-th row and a t-th column, the control signal terminal is electrically connected with an s-th control signal line, the light emitting signal terminal is electrically connected with an s-th light emitting signal line, the scan signal terminal is electrically connected with an s-th scan signal line, the data signal terminal is electrically connected with a t-th data signal line, 1<s≤ 2 M, 1<t<N;
the light emitting drive circuit comprises: M cascaded light emitting shift registers, a light emitting shift register of at least one stage is electrically connected with two light emitting signal lines, the scan drive circuit comprises M cascaded scan shift registers, a scan shift register of at least one stage is electrically connected with two scan signal lines, the control drive circuit comprises 2 M cascaded control shift registers, a control shift register of at least one stage is electrically connected with one control signal line, 1<i<M; a light emitting shift register, a scan shift register, and a control shift register each comprise an input terminal and an output terminal;
an output terminal of an i-th stage light emitting shift register is electrically connected with a (2i −1)-th light emitting signal line to a 2i-th light emitting signal line respectively through an i-th light emitting output line; an output terminal of an i-th stage scan shift register is electrically connected with a (2i −1)-th scan signal line to a 2i-th scan signal line respectively through an i-th scan output line; an output terminal of an s-th stage control shift register is electrically connected with an s-th control signal line respectively;
the circuit structure layer comprises: a semiconductor layer, a first insulation layer, a first conductive layer, a second insulation layer, a second conductive layer, a third insulation layer, a third conductive layer, a fourth insulation layer, a first planarization layer, and a fourth conductive layer that are sequentially stacked on the base substrate;
when at least one of the light emitting output lines comprises at least two light emitting output parts connected with each other, at least two light emitting output parts located on a same light emitting output line are located in one film layer of the first conductive layer and the second conductive layer and one film layer of the third conductive layer and the fourth conductive layer;
when at least one of the scan output lines comprises at least two scan output parts connected with each other, at least two scan output parts located on a same scan output line are located in one film layer of the first conductive layer and the second conductive layer and one film layer of the third conductive layer and the fourth conductive layer;
when a light emitting output line has an integrally formed structure, the light emitting output line is located in the fourth conductive layer;
when a scan output line has an integrally formed structure, the scan output line is located in the second conductive layer; and
a resistivity of the first conductive layer and a resistivity of the second conductive layer are both greater than each of a resistivity of the third conductive layer and a resistivity of the fourth conductive layer.

2. The display substrate according to claim 1 , wherein the circuit structure layer comprises: a fifth conductive layer, a sixth insulation layer, a seventh insulation layer, and a sixth conductive layer;
the semiconductor layer, the first insulation layer, the first conductive layer, the second insulation layer, the second conductive layer, the third insulation layer, the fifth conductive layer, the sixth insulation layer, the third conductive layer, the fourth insulation layer, the first planarization layer, the fourth conductive layer, the seventh insulation layer, and the sixth conductive layer are sequentially stacked on the base substrate;
when at least one of the light emitting output lines comprises at least two light emitting output parts connected with each other, at least two light emitting output parts located on a same light emitting output line are located in one film layer of the first conductive layer, the second conductive layer, and the fifth conductive layer and one film layer of the third conductive layer, the fourth conductive layer, and the sixth conductive layer;
when at least one of the scan output lines comprises at least two scan output parts connected with each other, at least two scan output parts located on a same scan output line are located in one film layer of the first conductive layer, the second conductive layer, and the fifth conductive l

Assignees

• Boe Technology Group Co Ltd

Inventors

• Lu Jiangnan
• Feng Ke

Classifications

• G09G3/3266

  Details of drivers for scan electrodes · CPC title

• G09G2310/0286

  Details of a shift registers arranged for use in a driving circuit · CPC title

• G09G3/3233

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G3/3208

  organic, e.g. using organic light-emitting diodes [OLED] · CPC title

• G09G3/3275 Primary

  Details of drivers for data electrodes · CPC title