Display panel and display device

US12216368B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12216368-B2
Application numberUS-202118272343-A
CountryUS
Kind codeB2
Filing dateNov 29, 2021
Priority dateNov 29, 2021
Publication dateFeb 4, 2025
Grant dateFeb 4, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure provides a display panel, including: a first panel and a second panel opposite to the first panel; the first panel includes: gate lines extending along a first direction and data lines extending along a second direction, and the gate lines and the data lines intersect to define pixel regions; the second panel includes: a plurality of support column periodic units arranged in an array along the first direction and the second direction, each support column periodic unit includes a plurality of support columns, and at least a part of the support columns each satisfy: a connection line between the support column and a support column closest thereto extends along a third direction, and an included angle between the third direction and the first direction is not equal to 0°. The present disclosure further provides a display device.

First claim

Opening claim text (preview).

What is claimed is: 1. A display panel, comprising: a first panel and a second panel opposite to the first panel; wherein the first panel comprises: gate lines extending along a first direction and data lines extending along a second direction, and the gate lines and the data lines intersect to define pixel regions; and the second panel comprises: a plurality of support column periodic units arranged in an array along the first direction and the second direction, each of the plurality of support column periodic units comprises a plurality of support columns, and at least a part of the support columns each satisfy: an imaginary connection line between the support column and a support column closest thereto extends along a third direction, and an included angle between the third direction and the first direction is not equal to 0°, wherein the first panel comprises a plurality of pixel regions each comprising a transistor and a pixel electrode, the pixel electrode comprises a plurality of first branch electrodes extending along a fourth direction and a plurality of second branch electrodes extending along a fifth direction, and the first branch electrodes are connected to the second branch electrodes; the transistor has a gate electrode connected to a corresponding gate line, a source electrode connected to a corresponding data line, and a drain electrode connected to a corresponding pixel electrode; and each of the data lines comprises a first portion and a second portion alternately arranged, the first portion is connected to the second portion, the first portion extends along the fourth direction, the second portion extends along the fifth direction, the first portion and the first branch electrodes are arranged along the first direction, and the second portion and the second branch electrodes are arranged along the first direction, wherein a plurality of support columns in the second panel form a plurality of support column groups, and each of the plurality of support column groups comprises a plurality of support columns arranged along the third direction, and each support column in the support column group satisfies: an imaginary connection line between the support column and a support column closest thereto extends along the third direction, wherein the plurality of support columns in each of the plurality of support column periodic units comprise: at least one main support column and a plurality of auxiliary support columns; and a ratio of the number of the at least one main support columns to the number of the plurality of auxiliary support columns in each of the plurality of the support column periodic units is in the range of 1:50 to 1:10, wherein, in a direction perpendicular to the second panel, a part of main support columns in the second panel overlap the plurality of first branch electrodes in the first display panel; and/or, in the direction perpendicular to the second panel, a part of the main support columns in the second panel overlap the plurality of second branch electrodes in the first display panel; and/or, in the direction perpendicular to the second panel, a part of the main support columns in the second panel overlap the data lines in the first display panel; and/or, in the direction perpendicular to the second panel, a part of the main support columns in the second panel at least partially overlap the gate lines in the first display panel; and/or, in the direction perpendicular to the second panel, a part of auxiliary support columns in the second panel overlap the plurality of first branch electrodes in the first display panel; and/or, in the direction perpendicular to the second panel, a part of the auxiliary support columns in the second panel overlap the plurality of second branch electrodes in the first display panel; and/or, in the direction perpendicular to the second panel, a part of the auxiliary support columns in the second panel overlap the data lines in the first display panel; and/or, in the direction perpendicular to the second panel, a part of the auxiliary support columns in the second panel overlap the gate lines in the first display panel; and/or, in the direction perpendicular to the second panel, a part of the auxiliary support columns in the second panel overlap transistors in the first display panel. 2. The display panel of claim 1 , wherein the included angle between the third direction and the first direction is greater than or equal to 7°. 3. The display panel of claim 1 , wherein the first panel further comprises: a black matrix comprising a plurality of first light-shielding strips extending along the first direction and a plurality of second light-shielding strips extending along the second direction; and the plurality of first light-shielding strips cover areas where the gate lines are located, and the plurality of second light-shielding strips cover areas where the data lines are located; and a width, at intersections with the data lines, of the black matrix along an extending direction of the gate lines is greater than a width of the black matrix between two adjacent pixel regions in an extending direction of the data lines. 4. The display panel of claim 1 , wherein the display panel is divided into a plurality of periodic regions arranged in an array along the first direction and the second direction, the plurality of periodic regions are in one-to-one correspondence with the plurality of support column periodic units, each of the plurality of support column periodic units is in a corresponding periodic region, and the periodic regions are rectangular in shape; each of the plurality of support column periodic units comprises at least four main support columns, and four main support columns of the at least four main support columns are at four vertices of the corresponding periodic region respectively; and four adjacent periodic regions arranged in a 2×2 array share one main support column at a common vertex. 5. The display panel of claim 4 , wherein a distance between two main support columns adjacent to each other in the first direction is greater than 500 μm; and a distance between two main support columns adjacent to each other in the second direction is greater than 1000 μm. 6. The display panel of claim 4 , wherein support columns other than the four main support columns at the four vertices of the corresponding periodic region in each of the plurality of support column periodic units are divided into a plurality of support column sub-groups; and each of the plurality of support column sub-groups comprises a plurality of support columns arranged along the third direction, and each of the plurality of support columns in the support column sub-group satisfies: an imaginary connection line between the support column and a column closest thereto extends along the third direction. 7. The display panel of claim 6 , wherein the support columns other than the four main support columns at the four vertices of the corresponding periodic region in each of the plurality of support column periodic units comprise: one main support column and seventy-seven auxiliary support columns. 8. The display panel of claim 6 , wherein the four main support columns at the four vertices of the corresponding periodic region in each of the plurality of support column periodic units are: a first main support column, a second main support column adjacent to the first main support column in the first direction, a third main support column adjacent to the second main support column in the second direction, and a fourth main support column adjacent to the third main support column in the first direction; the support columns other than the four main support columns at the four vertices of the corresponding periodic

Assignees

Inventors

Classifications

  • Wiring, e.g. gate line, drain line · CPC title

  • including a specially adapted diffusing, scattering or light controlling members · CPC title

  • Light shielding layers, e.g. black matrix (G02F1/136209 takes precedence) · CPC title

  • characterised by the arrangement of polariser or analyser axes · CPC title

  • Active matrix addressed cells {(G02F1/134336, G02F1/134363 take precedence)} · CPC title

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Frequently asked questions

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What does patent US12216368B2 cover?
The present disclosure provides a display panel, including: a first panel and a second panel opposite to the first panel; the first panel includes: gate lines extending along a first direction and data lines extending along a second direction, and the gate lines and the data lines intersect to define pixel regions; the second panel includes: a plurality of support column periodic units arranged…
Who is the assignee on this patent?
Hefei Boe Optoelectronics Tech, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/1347. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 04 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).