Display substrate, manufacturing method thereof and display apparatus

Patent metadata

Field	Value
Publication number	US-12216364-B2
Application number	US-202218042522-A
Country	US
Kind code	B2
Filing date	Jun 29, 2022
Priority date	Jun 29, 2022
Publication date	Feb 4, 2025
Grant date	Feb 4, 2025

Abstract

The present disclosure provides a display substrate, a manufacturing method of the display substrate and a display apparatus. The display substrate includes a base substrate; an alignment layer, on the base substrate; a first electrode, located between the base substrate and the alignment layer and being in contact with the alignment layer; and a pattern layer, located between the base substrate and the alignment layer and being in contact with the alignment layer. An orthographic projection of the pattern layer on the base substrate does not overlap an orthographic projection of the first electrode on the base substrate, and a ratio of a contact angle of the pattern layer to a contact angle of the first electrode is greater than or equal to 7/12 and less than 3/2.

First claim

What is claimed is:

1. A display substrate, comprising:
a base substrate;
an alignment layer on the base substrate;
a first electrode, located between the base substrate and the alignment layer and being in contact with the alignment layer; and
a pattern layer, located between the base substrate and the alignment layer and being in contact with the alignment layer;
wherein an orthographic projection of the pattern layer on the base substrate does not overlap an orthographic projection of the first electrode on the base substrate, and a ratio of a contact angle of the pattern layer to a contact angle of the first electrode is greater than or equal to 7/12 and less than 3/2;
wherein the pattern layer and the first electrode are arranged at a same layer and made of a same material;
there are a plurality of first electrodes, and the plurality of first electrodes are arranged in an array on the base substrate; the orthographic projection of the pattern layer on the base substrate is located in an orthographic projection of a row gap of the first electrodes on the base substrate;
the first electrode comprises a first strip electrode and a second strip electrode which are integrally arranged;
wherein an extension direction of the first strip electrode is intersected with a row direction, a column direction and an extension direction of the second strip electrode, and the extension direction of the second strip electrode is intersected with the row direction and the column direction; and
the pattern layer extends in the extension direction of the first strip electrode and/or the extension direction of the second strip electrode.

2. The display substrate according to claim 1 , wherein when the pattern layer extends in the extension direction of the first strip electrode and the extension direction of the second strip electrode, extension directions of the pattern layer at two adjacent row gaps of the first electrodes are different.

3. The display substrate according to claim 1 , wherein:
a line width of the pattern layer is same as:
a line width of the first strip electrode which extends in a same direction as the pattern layer; and/or
a line width of the second strip electrode which extends in a same direction as the pattern layer; and

a line distance of the pattern layer is same as:
a line distance of the first strip electrode which extends in a same direction as the pattern layer; and/or
a line distance of the second strip electrode which extends in a same direction as the pattern layer.

4. The display substrate according to claim 1 , wherein the pattern layer comprises:
a plurality of block patterns arranged at intervals at the same row gap of the first electrodes;
wherein the block pattern extends in the row direction; or
strip patterns extending in the row direction at the row gap of the first electrodes;
wherein a length of the strip pattern in the row direction is same as a length of the row gap.

5. The display substrate according to claim 1 , further comprising:
a first signal line;
wherein an orthographic projection of the first signal line on the base substrate is located in an orthographic projection of a column gap of the first electrodes on the base substrate; and
the orthographic projection of the pattern layer on the base substrate does not overlap the orthographic projection of the first signal line on the base substrate.

6. The display substrate according to claim 5 , further comprising:
a transistor;
wherein at least part of the first signal line is electrically connected with the transistor; and
the orthographic projection of the pattern layer on the base substrate does not overlap an orthographic projection of the transistor on the base substrate.

7. The display substrate according to claim 1 , further comprising:
a second signal line;
wherein an orthographic projection of the second signal line on the base substrate is located in the orthographic projection of the row gap of the first electrodes on the base substrate; and
the orthographic projection of the pattern layer on the base substrate is located in the orthographic projection of the second signal line on the base substrate.

8. The display substrate according to claim 7 , wherein a ratio of a width of the pattern layer in the column direction to a width of the second signal line in the column direction is greater than or equal to ⅗ and less than 1.

9. The display substrate according to claim 1 , further comprising:
a second signal line;
wherein an orthographic projection of the second signal line on the base substrate is located in the orthographic projection of the row gap of the first electrodes on the base substrate, and there are two second signal lines arranged at the same row gap; and
at the same row gap of the first electrodes, the orthographic projections of the two second signal lines on the base substrate are located in the orthographic projection of the pattern layer on the base substrate.

10. The display substrate according to claim 1 , further comprising:
a first signal line and a second signal line which are intersected and mutually insulated;
wherein an orthographic projection of the first signal line on the base substrate is located in an orthographic projection of a column gap of the first electrodes on the base substrate, an orthographic projection of the second signal line on the base substrate is located in the orthographic projection of the row gap of the first electrodes on the base substrate, and there are two second signal lines arranged at the same row gap; and the first signal line comprises:
an island structure at an intersected position of the column gap of the first electrodes and a gap of the two second signal lines; and

the orthographic projection of the pattern layer on the base substrate is coincided with an orthographic projection of the island structure on the base substrate.

11. The display substrate according to claim 1 , further comprising:
a second signal line, and
a gate,
wherein the second signal line and the gate are of an integral structure and the gate protrudes relative to the second signal line; and
the pattern layer comprises:
a plurality of first partitions intersected with a row direction and a column direction; and
a second partition extending in the row direction;
wherein an orthographic projection of the first partitions on the base substrate is located in an orthographic projection of the gate on the base substrate, and an orthographic projection of the second partition on the base substrate is located in an orthographic projection of the second signal line on the base substrate.

12. The display substrate according to claim 1 , further comprising:
a second electrode located between a layer where the first electrode is located and the base substrate; wherein the orthographic projection of the first electrode on the base substrate overlaps with an orthographic projection of the second electrode on the base substrate; and/or
an insulating layer between a layer where the first electrode is located and a layer where the second electrode is located; wherein the first electrode shields a part of the insulating layer, and the insulating layer not shielded by the first electrode is reused as the pattern layer.

13. The display substrate according to claim 1 , wherein the alignment layer comprises:
a positioning region for arranging a spacer;
wherein an orthographic projection of the positioning region on the base substrate is located in the orthographic projection of the pattern layer on the base substrate.

14. A manufacturing method of the display s

Assignees

• Wuhan Boe Optoelectronics Technology Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Chen Qi
• Gao Yujie
• Wu Wei
• Zhang Hao
• Tong Yuan
• Zhou Yichen
• Zhang dang
• Zhang Yiyi
• Liu Xiang
• Zhu Taohe
• Dai Junfeng
• Li Jinli
• Huang Bo

Classifications

• G02F1/13439

  characterised by their electrical, optical, physical properties; materials therefor; method of making · CPC title

• G02F1/13378 Primary

  by treatment of the surface, e.g. embossing, rubbing or light irradiation (G02F1/133711, G02F1/133734, G02F1/133753 take precedence) · CPC title

• G02F1/1343

  Electrodes {(reflective electrodes G02F1/133553)} · CPC title

• G02F1/134336 Primary

  Matrix · CPC title

• G02F1/1337

  Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers · CPC title