Semiconductor device and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-12205945-B2
Application number	US-202318518382-A
Country	US
Kind code	B2
Filing date	Nov 22, 2023
Priority date	Dec 25, 2020
Publication date	Jan 21, 2025
Grant date	Jan 21, 2025

Abstract

The semiconductor device includes a substrate, a first nitride semiconductor layer disposed on the substrate, a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer. The semiconductor device further includes a first gate conductor disposed on a first region of the second nitride semiconductor layer, a first source electrode disposed on a first side of the first gate conductor, a first field plate disposed on a second side of the first gate conductor, a first conductive terminal and a second conductive terminal disposed on a second region of the second nitride semiconductor layer, and a resistor formed in the first nitride semiconductor layer and electrically connected between the first conductive terminal and the second conductive terminal, wherein the resistor comprises at least one conductive region.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a substrate;
a first nitride semiconductor layer disposed on the substrate;
a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer;
a first gate conductor disposed on a first region of the second nitride semiconductor layer;
a first source electrode disposed on a first side of the first gate conductor;
a first field plate disposed on a second side of the first gate conductor;
a dielectric layer disposed on the second nitride semiconductor layer and the first gate conductor;
a first conductive terminal and a second conductive terminal disposed on a second region of the second nitride semiconductor layer, wherein the first conductive terminal and the second conductive terminal are formed by removing a part of the dielectric layer; and
a resistor formed in the first nitride semiconductor layer and electrically connected between the first conductive terminal and the second conductive terminal, wherein the resistor comprises at least one conductive region.

2. The semiconductor device according to claim 1 , wherein the second region is laterally spaced apart from the first region.

3. The semiconductor device according to claim 1 , wherein the conductive region is in contact with the first conductive terminal and the second conductive terminal.

4. The semiconductor device according to claim 1 , wherein the first conductive terminal and the second conductive terminal have a same first width; and
the resistor comprises one conductive region between the first conductive terminal and the second conductive terminal, and the conductive region has a second width smaller than the first width, wherein directions of the first width and the second width are perpendicular to a direction pointing from the first conductive terminal to the second conductive terminal in a top view.

5. The semiconductor device according to claim 4 , further comprising a doped region, wherein the doped region is in contact with and located between the first conductive terminal and the second conductive terminal.

6. The semiconductor device according to claim 1 , wherein the first conductive terminal and the second conductive terminal have a same first width; and
the resistor comprises one conductive region between the first conductive terminal and the second conductive terminal, and the conductive region has a second width greater than the first width, wherein directions of the first width and the second width are perpendicular to a direction pointing from the first conductive terminal to the second conductive terminal in a top view.

7. The semiconductor device according to claim 6 , wherein a first part of the first conductive terminal and a second part of the second conductive terminal are surrounded by the conductive region respectively.

8. The semiconductor device according to claim 1 , wherein the resistor comprises a first conductive region and a second conductive region which are located between the first conductive terminal and the second conductive terminal, and the first conductive region and the second conductive region are substantially parallel to each other.

9. The semiconductor device according to claim 8 , wherein a doped region is formed between the first conductive region and the second conductive region and is in contact with the first conductive terminal and the second conductive terminal.

10. The semiconductor device according to claim 9 , wherein the doped region is an insulation region.

11. The semiconductor device according to claim 1 , wherein the resistor comprises a plurality of first conductive regions and at least two second conductive regions, the first conductive regions and the second conductive regions being located between the first conductive terminal and the second conductive terminal, and the first conductive regions being substantially parallel to each other,
wherein adjacent two of the first conductive regions are separated by one of the second conductive regions, and the second conductive regions are substantially perpendicular to the first conductive regions.

12. The semiconductor device according to claim 11 , wherein each of the second conductive regions is in contact with the first conductive terminal or the second conductive terminal.

13. The semiconductor device according to claim 1 , wherein the resistor comprises at least two conductive regions between the first conductive terminal and the second conductive terminal, and each of the conductive regions comprises a curved portion comprising one or more concave portions and/or one or more convex portions.

14. A method for fabricating a semiconductor device, the method comprising:
providing a semiconductor structure having a substrate, a first nitride semiconductor layer and a second nitride semiconductor layer;
forming a first gate conductor in contact with the second nitride semiconductor layer;
forming a dielectric layer on the second nitride semiconductor layer and the first gate conductor and forming conductive terminals by removing a part of the dielectric layer;
forming a first field plate adjacent to the first gate conductor; and
forming a resistor in the first nitride semiconductor layer, the resistor being electrically connected between the conductive terminals.

Assignees

• Innoscience Suzhou Technology Holding Co Ltd

Inventors

• Mao Danfeng
• Wong King Yuen
• Zhang Jinhan
• Zhang Xiaoyan
• Wang Wei
• Sheng Jianjian

Classifications

• H10D62/8503 Primary

  Nitride Group III-V materials, e.g. AlN or GaN · CPC title

• H10D62/852

  being Group III-V materials comprising three or more elements, e.g. AlGaN or InAsSbP · CPC title

• H10D84/813

  Combinations of field-effect devices and capacitor only · CPC title

• H10D84/0163

  the components including enhancement-mode IGFETs and depletion-mode IGFETs · CPC title

• H10D88/01

  Manufacture or treatment · CPC title