Imager verification systems and methods

Patent metadata

Field	Value
Publication number	US-12200187-B2
Application number	US-202218068453-A
Country	US
Kind code	B2
Filing date	Dec 19, 2022
Priority date	Jun 22, 2020
Publication date	Jan 14, 2025
Grant date	Jan 14, 2025

Abstract

Techniques for facilitating imager verification systems and methods are provided. In one example, an imaging device includes a focal plane array. The focal plane array includes a detector array including a plurality of detectors, where each of the plurality of detectors is configured to detect electromagnetic radiation to obtain image data. The focal plane array further includes a readout circuit configured to perform a readout to obtain the image data from each of the plurality of detectors. The imaging device further includes a processing circuit configured to perform a verification of the imaging device based at least on the image data. Related methods and systems are also provided.

First claim

What is claimed is:

1. An imaging device comprising:
a focal plane array (FPA) comprising:
a detector array comprising a plurality of detectors, wherein each of the plurality of detectors is configured to detect electromagnetic radiation to obtain image data; and
a readout circuit configured to perform a readout to obtain the image data from each of the plurality of detectors;

a verification circuit configured to generate a first cyclic redundancy code (CRC) based on the image data from each of the plurality of detectors; and
a processing circuit configured to:
receive, via a data output interface, the first CRC and the image data from each of the plurality of detectors;
generate a second CRC based on the image data received via the data output interface; and
perform a verification of the imaging device based at least on the image data, wherein the verification of the imaging device comprises a verification of the data output interface based at least on the first CRC and the second CRC.

2. The imaging device of claim 1 , wherein the processing circuit is further configured to transmit a notification based on the verification of the imaging device, wherein the notification comprises an error notification indicative of a type of error detected in the FPA.

3. The imaging device of claim 1 , further comprising a bias circuit configured to inject a respective set of signals into each detector of a subset of the plurality of detectors, wherein the image data of each detector of the subset is based at least on the respective injected signal, and wherein the verification of the imaging device further comprises a verification of the readout circuit based at least on the image data.

4. The imaging device of claim 3 , further comprising a parallel data interface configured to receive the sets of signals from the bias circuit and provide each respective set of signals to a corresponding detector of the subset, wherein the verification of the imaging device further comprises a verification of the parallel data interface.

5. The imaging device of claim 3 , wherein the subset of the plurality of detectors comprises:
a plurality of rows of detectors, wherein the processing circuit is configured to, for each row of the plurality of rows of detectors, generate a checksum for the row based on the image data from each detector of the row, and wherein the verification of the imaging device further comprises a verification of a row order of the readout circuit; and/or
a plurality of columns of detectors, wherein the processing circuit is configured to, for each column of the plurality of columns of detectors, generate a checksum for the column based on the image data from each detector of the column, and wherein the verification of the imaging device further comprises a verification of a column order of the readout circuit.

6. The imaging device of claim 1 , wherein:
the readout circuit comprises a plurality of column amplifiers, wherein each of the plurality of column amplifiers is configured to receive the image data from detectors of a respective column of the detector array and amplify the image data to obtain amplified image data,
the verification of the imaging device further comprises a verification of the plurality of column amplifiers based at least on the amplified image data,
the readout circuit is configured to associate the image data with a frame number, and
the verification of the imaging device is further based at least on the frame number.

7. The imaging device of claim 1 , further comprising:
a first memory configured to store a first copy of a set of parameters and a second memory configured to store a second copy of the set of parameters, wherein the processing circuit is configured to perform the verification of the imaging device at least by comparing the first copy with the second copy;
an inertial measurement unit configured to determine motion data associated with a scene, wherein the image data is associated with the scene, and wherein the verification of the imaging device is further based at least on the motion data and the image data.

8. The imaging device of claim 1 , wherein:
the detector array is configured to detect the electromagnetic radiation from a first portion of a scene;
the processing circuit is further configured to receive, from a second imaging device, image data associated with a second portion of the scene;
the first portion at least partially overlaps the second portion; and
the verification of the imaging device is further based on a difference between the image data from each of the plurality of detectors of the FPA and the image data from the second imaging device.

9. An imaging device comprising:
a focal plane array (FPA) comprising:
a detector array comprising a plurality of detectors, wherein each of the plurality of detectors is configured to detect electromagnetic radiation to obtain image data; and
a readout circuit configured to perform a readout to obtain the image data from each of the plurality of detectors;

a bias circuit configured to inject a respective set of signals into each detector of a subset of the plurality of detectors, wherein the image data of each detector of the subset is based at least on the respective injected signal; and
a processing circuit configured to perform a verification of the imaging device based at least on the image data, wherein the verification of the imaging device further comprises a verification of the readout circuit based at least on the image data,
wherein the subset of the plurality of detectors comprises:
a plurality of blind detectors;
a plurality of rows of detectors, wherein the processing circuit is configured to, for each row of the plurality of rows of detectors, generate a checksum for the row based on the image data from each detector of the row, and wherein the verification of the imaging device comprises a verification of a row order of the readout circuit; and/or
a plurality of columns of detectors, wherein the processing circuit is configured to, for each column of the plurality of columns of detectors, generate a checksum for the column based on the image data from each detector of the column, and wherein the verification of the imaging device further comprises a verification of a column order of the readout circuit.

10. The imaging device of claim 9 , further comprising a shutter configured to selectively block the detector array, wherein the detector array is configured to capture an image comprising the image data from each of the plurality of detectors when the shutter blocks the detector array, and wherein the verification of the imaging device further comprises a verification of the FPA and/or the shutter based on the image, and
wherein the processing circuit is configured to:
determine a spatial noise associated with the image, wherein the verification of the imaging device is further based on the spatial noise; and/or
determine a responsivity associated with the image, wherein the verification of the imaging device is further based on the responsivity.

11. The imaging device of claim 10 , wherein:
the image is a first image captured during a first time duration;
the detector array is further configured to capture a second image when the shutter blocks the detector array during a second time duration; and
the processing circuit is configured to determine the responsivity based on the first image, the second image, a temperature of the shutter associated with the first time duration, and a temperature of the shutter associated with the second time duration.

12. An imaging device comprising:
a focal plane array (FPA) comprising:
a

Assignees

• Teledyne Flir Commercial Systems Inc

Inventors

• Fairfield Nile E
• Hansen Randy J
• Judd Kelsey M
• Tauber Sean
• Imamura Jeffrey

Classifications

• H04N23/23

  from thermal infrared radiation · CPC title

• H04N23/11

  for generating image signals from visible and infrared light wavelengths · CPC title

• H04N25/78

  Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

• H04N25/69

  SSIS comprising testing or correcting structures for circuits other than pixel cells · CPC title

• H03M13/09

  Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit · CPC title