Electronic device with intelligent boot

US12197922B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12197922-B2
Application numberUS-202217945950-A
CountryUS
Kind codeB2
Filing dateSep 15, 2022
Priority dateSep 15, 2022
Publication dateJan 14, 2025
Grant dateJan 14, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A system includes a processor, a charger circuit and a battery management unit (BMU). The charger circuit charges a battery. The BMU includes an intelligent boot module that can send a boot signal to the processor based on information including a battery condition and system information. The processor starts a boot sequence based on the boot signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A system comprising: a processor; a charger circuit configured to charge a battery; and a battery management unit (BMU) including an intelligent boot module, wherein: the intelligent boot module is configured to send a boot signal to the processor based on information including a battery condition and system information, the boot signal being sent based at least in part on a cell voltage of the battery being greater than a cutoff voltage by a predetermined value, and the processor is configured to start a boot sequence based on the boot signal. 2. The system of claim 1 , wherein the battery condition includes one or more of a battery voltage, a battery current or a battery model, wherein the processor is further configured to: initiate the boot sequence for a system boot based on a determination with the boot signal that the battery condition is sufficient to initiate the boot sequence based on a first confirmation that a state-of-charge (SOC) of the battery is greater than a battery charge level for the system boot and a second confirmation that a cell voltage of the battery is greater than the cutoff voltage by the predetermined value; and send a command to the charger circuit to charge the battery based on a determination with the boot signal that the battery condition is not sufficient to initiate the boot sequence. 3. The system of claim 1 , wherein the system information includes a charger circuit information, a system boot power information and the cutoff voltage. 4. The system of claim 1 , wherein the intelligent boot module is configured to receive a charger-connect indicator from the charger circuit to determine a state of connection of a charger to the charger circuit for reporting to a BMU process. 5. The system of claim 4 , wherein the intelligent boot module is configured to receive a high-power charger indicator from the processor to indicate that the charger is a high-power charger for reporting to the BMU process, wherein the high-power charger has a power of greater than about 10 Watts. 6. The system of claim 5 , wherein the intelligent boot module is configured to use the BMU process to determine a battery charge level for a system boot and compare that with a state-of-charge (SOC) of the battery. 7. The system of claim 6 , wherein the intelligent boot module is further configured to receive the cutoff voltage as an effective SOC cutoff voltage from a shut-down process of the processor for reporting to the BMU process. 8. The system of claim 7 , wherein the intelligent boot module is configured to make a first confirmation that the determined battery charge level for the system boot is compatible with the SOC of the battery. 9. The system of claim 8 , wherein the intelligent boot module is further configured to make a second confirmation that the cell voltage of the battery is greater than the effective SOC cutoff voltage by the predetermined value. 10. The system of claim 9 , wherein the intelligent boot module is configured to send the boot signal to the processor based on the first confirmation and the second confirmation. 11. An electronic device comprising: a charger circuit configured to receive current from a charger and charge a battery; and a processor, wherein: the processor is configured to start a boot sequence based on a decision formed based on information including a condition of the battery and additional device information, the boot sequence being started based at least in part on a cell voltage of the battery being greater than a cutoff voltage by a predetermined value. 12. The electronic device of claim 11 , wherein the condition of the battery includes, a battery voltage, a battery current and a battery model, and the additional device information includes a charger circuit information, a system boot power information and the cutoff voltage. 13. The electronic device of claim 11 , further comprising a battery management unit (BMU), wherein the decision is made by the BMU configured to receive a charger-connect indicator from the charger circuit to determine a state of connection of the charger to the charger circuit. 14. The electronic device of claim 13 , wherein the BMU is configured to receive a high-power charger indicator from the processor to indicate that the charger is a high-power charger, wherein the high-power charger has a power of greater than about 10 Watts. 15. The electronic device of claim 14 , wherein the BMU is configured to use a BMU process to determine a battery charge level for a system boot based on the charger-connect indicator and the high-power charger indicator and compare the determined battery charge level with a SOC of the battery. 16. The electronic device of claim 15 , wherein the BMU is further configured to receive the cutoff voltage as an effective state-of-charge (SOC) cutoff voltage from a shut-down process of the processor for reporting to the BMU process. 17. The electronic device of claim 16 , wherein the BMU is configured to make a first confirmation that the determined battery charge level for the system boot is compatible with the SOC of the battery and a second confirmation that the cell voltage of the battery is greater than the effective SOC cutoff voltage by the predetermined value and send a boot signal to the processor based on the first confirmation and the second confirmation. 18. A process implemented by a processor, the process comprising: receiving a charger-connect indicator from a charger circuit and determining a state of connection of a charger to the charger circuit based on the charger-connect indicator; receiving a high-power charger indicator from the processor indicating that the charger is a high-power charger; determining a battery charge level for a system boot based on the charger-connect indicator and the high-power charger indicator; making a first confirmation that the determined battery charge level is greater than a state-of-charge (SOC) of a battery; and making a second confirmation that a cell voltage of the battery is greater than an effective SOC cutoff voltage by a margin corresponding to a hysteresis of the effective SOC cutoff voltage. 19. The process of claim 18 , further comprising receiving the effective SOC cutoff voltage from a shut-down process of the processor. 20. The process of claim 19 , further comprising starting a boot process based on the first confirmation and the second confirmation.

Assignees

Inventors

Classifications

  • H02J7/82Primary

    Control of state of charge [SOC] · CPC title

  • G06F9/4403Primary

    Processor initialisation · CPC title

  • Bootstrapping (security arrangements therefor G06F21/57) · CPC title

  • Electricity · mapped topic

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Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12197922B2 cover?
A system includes a processor, a charger circuit and a battery management unit (BMU). The charger circuit charges a battery. The BMU includes an intelligent boot module that can send a boot signal to the processor based on information including a battery condition and system information. The processor starts a boot sequence based on the boot signal.
Who is the assignee on this patent?
Apple Inc
What technology area does this patent fall under?
Primary CPC classification H02J7/82. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 14 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).