Display panel and display device

Patent metadata

Field	Value
Publication number	US-12193286-B2
Application number	US-202217587884-A
Country	US
Kind code	B2
Filing date	Jan 28, 2022
Priority date	Nov 10, 2021
Publication date	Jan 7, 2025
Grant date	Jan 7, 2025

Abstract

Display panel and display device are provided. The display panel includes a display area and a non-display area surrounding the display area. The display area includes a plurality of scan lines extending in a first direction and a plurality of data lines extending in a second direction, the first direction intersects the second direction. The non-display area includes a bonding area. The bonding area includes a plurality of pads arranged in a third direction. A direction perpendicular to the third direction is a fourth direction. An angle formed by the second direction and the fourth direction is θ, and 0°<θ<90°.

First claim

What is claimed is:

1. A display panel, comprising a display area and a non-display area surrounding the display area, wherein:
the display area comprises a plurality of scan lines extending in a first direction and a plurality of data lines extending in a second direction, the first direction intersects the second direction; and
the non-display area comprises a bonding area, the bonding area comprises a plurality of pads arranged in a third direction, a direction perpendicular to the third direction is a fourth direction, an angle formed by the second direction and the fourth direction is θ, and 0°<θ<90°.

2. The display panel according to claim 1 , wherein 0°<θ≤45°.

3. The display panel according to claim 1 , wherein the non-display area comprises a first power bus at least partially surrounding the display area, the plurality of pads comprises at least one first conductive pad, the first power bus comprises a first connection node, and the first power bus is connected to the at least one first conductive pad at the first connection node through a bus connection portion.

4. The display panel according to claim 3 , wherein:
the non-display area further comprises a second power bus at least partially surrounding the display area, the second power bus is located between the first power bus and the display area, and the second power bus is electrically connected to the first power bus; and
the display area comprises voltage signal transmission lines extending along the second direction, and the second power bus is electrically connected to at least part of the voltage signal transmission lines and transmits voltage signals to the display area.

5. The display panel according to claim 4 , wherein:
the first power bus further comprises a second connection node, and the first power bus is electrically connected to the second power bus at the second connection node; and
the first connection node and the second connection node are different, and the second connection node is on a side of the first power bus close to the bonding area along the second direction.

6. The display panel according to claim 5 , wherein the first power bus is recessed toward the display area at the second connection node.

7. The display panel according to claim 3 , wherein:
the bus connection portion comprises a first sub-connection portion extending along the third direction and at least one second sub-connection portion extending along the fourth direction;
two ends of the first sub-connection portion are respectively connected to the at least one first conductive pad; and
one end of the second sub-connection portion is connected to a third connection node between the two ends of the first sub-connection portion, and another end of the second sub-connection portion is connected to the first connection node.

8. The display panel according to claim 7 , wherein the at least one first conductive pad connected to the two ends of the first sub-connection portion comprises a first sub-conductive pad and a second sub-conductive pad, and along the third direction, a perpendicular distance from a center of the first sub-conductive pad to the second sub-connection portion is greater than a perpendicular distance from a center of the second sub-conductive pad to the second sub-connection portion.

9. The display panel according to claim 3 , wherein:
the non-display area further comprises gate driving circuits and clock signal lines disposed on two sides of the display panel, the clock signal lines are disposed on a side of the first power bus close to the display area, the clock signal lines comprise first clock signal lines and second clock signal lines that respectively drive the gate driving circuits on the two sides of the display panel, and the bus connection portion comprises at least one second sub-connection portion extending along the fourth direction; and
the plurality of pads further comprises a plurality of second conductive pads, the clock signal lines are electrically connected to the plurality of second conductive pads through clock signal connection lines, the clock signal connection lines comprise first clock signal connection portions extending along the fourth direction, and the first clock signal connection portions are disposed on two sides of the second sub-connection portion.

10. The display panel according to claim 9 , wherein:
at least part of the first clock signal connection portions is electrically connected to the second conductive pads through second clock signal connection portions extending along the third direction; and
the second clock signal connection portions are disposed on a side of the first clock signal connection portions away from the second sub-connection portion.

11. The display panel according to claim 9 , wherein:
at least part of the first clock signal lines is connected to the clock signal connection lines through a first jump-lead; and
the first jump-lead and the first power bus are overlapped and disposed in different layers, and the clock signal connection lines are disposed on a side of the first power bus away from the display area.

12. The display panel according to claim 3 , wherein:
the non-display area further comprises a plurality of multiplexing units and a plurality of fan-out wirings, the plurality of pads comprises a plurality of third conductive pads;
an input end of a multiplexing unit of the plurality of multiplexing units is connected to a third conductive pad of the plurality of third conductive pads through a fan-out wiring of the plurality of fan-out wirings, and an output end of the multiplexing unit of the plurality of multiplexing units is connected to a data line of the plurality of data lines; and
along the third direction, the plurality of third conductive pads is disposed between two first conductive pads.

13. The display panel according to claim 12 , wherein:
the bus connection portion comprises a first sub-connection portion extending along the third direction and at least one second sub-connection portion extending along the fourth direction; and
along the third direction, number of the third conductive pads on one side of the second sub-connection portion is greater than number of the third conductive pads on another side of the second sub-connection portion.

14. The display panel according to claim 12 , wherein the plurality of fan-out wirings comprises first fan-out wiring portions, and the first fan-out wiring portions do not overlap the first power bus.

15. The display panel according to claim 12 , further comprising an encapsulation structure disposed between the display area and the bonding area, wherein:
the bus connection portion comprises a first sub-connection portion extending along the third direction and at least one second sub-connection portion extending along the fourth direction; and
in a direction perpendicular to a plane where the display panel is located, the first fan-out wiring portions close to the second sub-connection portion overlap the encapsulation structure.

16. The display panel according to claim 15 , wherein the encapsulation structure comprises an encapsulation adhesive, and the encapsulation adhesive does not overlap the display area.

17. The display panel according to claim 15 , further comprising an encapsulation film, wherein the encapsulation film covers the display area and extends to an organic clearance area of the non-display area, and the encapsulation structure comprises barrier members disposed in the organic clearance area.

18. The display panel accordi

Assignees

• Wuhan Tianma Micro Electronics Co Ltd
• Wuhan Tianma Microelectronics Co Ltd Shanghai Branch

Inventors

• Li Yue
• Zhou Xingyao
• Gao Zhuan
• Wang Qingxia
• Wu Yuantao

Classifications

• G09G2320/0223

  Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes · CPC title

• G09G3/32

  semiconductive, e.g. using light-emitting diodes [LED] · CPC title

• H10K50/844

  Encapsulations · CPC title

• H10K77/10

  Substrates, e.g. flexible substrates · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title