Processor including monitoring circuitry for virtual counters

US12189509B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12189509-B2
Application numberUS-202018252659-A
CountryUS
Kind codeB2
Filing dateDec 24, 2020
Priority dateDec 24, 2020
Publication dateJan 7, 2025
Grant dateJan 7, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In an embodiment, a processor for redirecting requests includes a processing engine to execute a guest system, and monitoring circuitry coupled to the processing engine. The monitoring circuitry may be to: receive, from the guest system, a first request to access a first virtual counter; in response to a receipt of the first request, determine, based a mapping register of the processor, a first physical counter mapped to the first virtual counter; and redirect the first request to the first physical counter mapped to the first virtual counter. Other embodiments are described and claimed.

First claim

Opening claim text (preview).

What is claimed is: 1. A processor for redirecting requests, comprising: a processing engine to execute a guest system; and monitoring circuitry coupled to the processing engine, the monitoring circuitry to: receive, from the guest system, a first request to access a first virtual counter; in response to a receipt of the first request, determine, based a mapping register of the processor, a first physical counter mapped to the first virtual counter; and redirect the first request to the first physical counter mapped to the first virtual counter. 2. The processor of claim 1 , wherein the monitoring circuitry, the mapping register, and the first physical counter are implemented in a hardware performance monitoring unit included in the processor, and wherein the first virtual counter is to be used for performance monitoring in the guest system. 3. The processor of claim 1 , the processing engine to execute a virtualization manager to, prior to receipt of the first request: receive a second request to allocate the first virtual counter to the guest system; in response to a receipt of the second request, determine whether a virtual counter flag is active; and in response to a determination that the virtual counter flag is not active: generate a fault code to indicate that the virtual counter flag is not active; and update a fault register of the processor to store the fault code. 4. The processor of claim 3 , the virtualization manager to, prior to receipt of the first request: in response to a determination that the virtual counter flag is active: map the first physical counter to the first virtual counter; and populate the mapping register to indicate that the first physical counter is mapped to the first virtual counter. 5. The processor of claim 3 , the virtualization manager to, prior to receipt of the first request: receive, from the guest system, a third request for a configuration change to the first virtual counter; in response to a receipt of the third request, read a first access register of the processor that is associated with the first virtual counter; and perform the configuration change in response to a determination that the first access register indicates that the guest system is authorized for the configuration change. 6. The processor of claim 5 , wherein the first access register is to store a bitmask associated with a set of bits of a configuration register for the first physical counter. 7. The processor of claim 1 , wherein the mapping register is to be divided into a plurality of range portions, wherein a first range portion of the mapping register is to be defined as corresponding to the first virtual counter, and wherein the first range portion of the mapping register is to be populated with an identifier of the first physical counter. 8. A method for redirecting requests, comprising: receiving, by monitoring circuitry of a processor, a first request from a guest system to access a first virtual counter; reading, by the monitoring circuitry, a mapping register of the processor storing a first mapping between the first virtual counter and a first physical counter; and redirecting, by the monitoring circuitry, the first request to the first physical counter based on the first mapping. 9. The method of claim 8 , wherein the monitoring circuitry, the mapping register, and the first physical counter are implemented in a hardware performance monitoring unit included in the processor, and wherein the first virtual counter is to be used for performance monitoring in the guest system. 10. The method of claim 8 , comprising, prior to receiving the first request: receiving a second request to allocate the first virtual counter to the guest system; in response to a receipt of the second request, determining whether a virtual counter flag is active; and in response to a determination that the virtual counter flag is active: mapping the first physical counter to the first virtual counter; and populating the mapping register to indicate that the first physical counter is mapped to the first virtual counter. 11. The method of claim 8 , comprising, prior to receiving the first request: receiving, from the guest system, a third request for a first configuration change to the first virtual counter; in response to a receipt of the third request, determining whether a first access register of the processor indicates that that the guest system is authorized for the first configuration change; and in response to a determination that the first access register indicates that the guest system is authorized for the first configuration change, performing the first configuration change. 12. The method of claim 11 , comprising, prior to receiving the first request: receiving, from the guest system, a fourth request for a second configuration change to the first virtual counter; in response to a receipt of the third request, determining whether the first access register of the processor indicates that the guest system is authorized for the second configuration change; and in response to a determination that the first access register indicates that the guest system is not authorized for the second configuration change: generating a first fault code indicating that the guest system is not authorized for the second configuration change; and updating a fault register of the processor to store the fault code. 13. The method of claim 11 , wherein the first access register is to store a bitmask associated with a set of bits of a configuration register for the first physical counter. 14. The method of claim 8 , wherein the mapping register is to be divided into a plurality of range portions, wherein a first range portion of the mapping register is to be defined as corresponding to the first virtual counter, and wherein the first range portion of the mapping register is to be populated with an identifier of the first physical counter. 15. A system for redirecting requests, comprising: a processor including a plurality of processing engines and monitoring circuitry, the monitoring circuitry to: receive, from a guest system executed by the processor, a first request to access a first virtual counter; in response to a receipt of the first request, determine, based a mapping register of the processor, a first physical counter mapped to the first virtual counter; and redirect the first request to the first physical counter mapped to the first virtual counter; and an external memory coupled to the processor. 16. The system of claim 15 , wherein the monitoring circuitry, the mapping register, and the first physical counter are implemented in a hardware performance monitoring unit included in the processor, and wherein the first virtual counter is to be used for performance monitoring in the guest system. 17. The system of claim 15 , the processor to execute a virtualization manager to, prior to a receipt of the first request: in response to a determination that a virtual counter flag is active: map the first physical counter to the first virtual counter; and populate the mapping register to indicate that the first physical counter is mapped to the first virtual counter. 18. The system of claim 15 , a virtualization manager to, prior to a receipt of the first request: receive, from the guest system, a third request for a configuration change to the first virtual counter; in response to a receipt of the third request, read a first access register of the processor that is associated with the first virtual counter; and perform

Assignees

Inventors

Classifications

  • G06F9/3851Primary

    from multiple instruction streams, e.g. multistreaming · CPC title

  • controlled by a single instruction for multiple threads [SIMT] in parallel · CPC title

  • Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers · CPC title

  • Guest-host, i.e. hypervisor is an application program itself, e.g. VirtualBox · CPC title

  • according to context, e.g. thread buffers · CPC title

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Frequently asked questions

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What does patent US12189509B2 cover?
In an embodiment, a processor for redirecting requests includes a processing engine to execute a guest system, and monitoring circuitry coupled to the processing engine. The monitoring circuitry may be to: receive, from the guest system, a first request to access a first virtual counter; in response to a receipt of the first request, determine, based a mapping register of the processor, a first…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06F9/3851. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 07 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).