Multi-phase buck converter circuit, fault detection method and apparatus thereof, and storage medium

Patent metadata

Field	Value
Publication number	US-12184164-B2
Application number	US-202117480134-A
Country	US
Kind code	B2
Filing date	Sep 20, 2021
Priority date	Mar 20, 2019
Publication date	Dec 31, 2024
Grant date	Dec 31, 2024

Abstract

A multi-phase buck converter circuit is provided, including a power supply, a plurality of phase buck circuits, each phase buck circuit including an input terminal, an output terminal, and a second input terminal, with input terminals of the plurality coupled to the power supply, a plurality of inductors coupled to the output terminals of the plurality of phase buck circuits, the plurality of inductors providing an output voltage at an output of the multi-phase buck converter circuit, a detection controller coupled to the output terminals of the plurality of phase buck circuits, the detection controller configured to detect a fault in the plurality of phase buck circuits, and a drive circuit coupled to the detection controller and coupled to each second input terminal of the plurality of phase buck circuits. The drive circuit is configured to detect a faulty phase buck circuit and stop driving the faulty phase buck circuit.

First claim

What is claimed is:

1. A multi-phase buck converter circuit, comprising:
a power supply;
a plurality of phase buck circuits, each phase buck circuit of the plurality of phase buck circuits including:
an input terminal;
an output terminal; and
a second input terminal, with the input terminal and the second input terminal of the each phase buck circuit of the plurality of phase buck circuits being coupled to the power supply;
a third capacitor;
an inductor;
a first MOS transistor, with a drain of the first MOS transistor connected to the power supply;
a second MOS transistor, with a source of the first MOS transistor connected to a drain of the second MOS transistor and to a first terminal of the third capacitor;
a third MOS transistor, with a source of the second MOS transistor is connected to a drain of the third MOS transistor and to a first terminal of the inductor;
a fourth MOS transistor, with a source of the third MOS transistor is connected to a drain of the fourth MOS transistor and to a second terminal of the third capacitor and wherein a source of the fourth MOS transistor is connected to ground; and
a fault detection point comprising a connection point between the source of the second MOS transistor and the drain of the third MOS transistor;
a plurality of inductors coupled to the output terminals of the plurality of phase buck circuits, the plurality of inductors providing an output voltage at an output of the multi-phase buck converter circuit;
a detection controller coupled to the output terminals of the plurality of phase buck circuits, the detection controller configured to detect a fault in the plurality of phase buck circuits; and
a drive circuit coupled to the detection controller and coupled to each second input terminal of the plurality of phase buck circuits, the drive circuit configured to detect a faulty phase buck circuit and stop driving the faulty phase buck circuit.

2. The multi-phase buck converter circuit according to claim 1 , wherein the plurality of phase buck circuits comprises N phase buck circuits and the drive circuit comprises N drive subcircuits in one-to-one correspondence with the N phase buck circuits; and
input terminals of the N drive subcircuits are connected to an output terminal of the detection controller, and output terminals of the N drive subcircuits are connected to the second input terminals of the corresponding N phase buck circuits.

3. The multi-phase buck converter circuit according to claim 1 , wherein the plurality of phase buck circuits comprises N phase buck circuits and the drive circuit comprises N drive subcircuits in one-to-one correspondence with the N phase buck circuits; and
input terminals of the N drive subcircuits are connected to an output terminal of the detection controller, and output terminals of the N drive subcircuits are connected to the second input terminals of the corresponding N phase buck circuit.

4. The multi-phase buck converter circuit according to claim 1 , wherein the multi-phase buck converter circuit comprises a network device.

5. A fault detection method of a multi-phase buck converter circuit, the method comprising:
detecting a fault detection point voltage at a fault detection point of a phase buck circuit in a detection period, the detection period comprising a first detection moment and a second detection moment, the first detection moment comprising a time period in which a first MOS transistor in the phase buck circuit is on, and the second detection moment comprising a time period in which a second MOS transistor in the phase buck circuit is on;
determining, based on the fault detection point voltage in the detection period, that the phase buck circuit is faulty, the determining comprising:
if a voltage at the first detection moment in the current detection period is higher than a first voltage threshold and a voltage at the second detection moment in the current detection period is lower than a second voltage threshold, or the voltage at the first detection moment in the current detection period is lower than the second voltage threshold and the voltage at the second detection moment in the current detection period is higher than the first voltage threshold, obtaining voltages in M historical detection periods, wherein the M historical detection periods and the current detection period are consecutive, M is a positive integer, the first voltage threshold is greater than half of a voltage of the power supply and less than the voltage of the power supply, and the second voltage threshold is less than the half of the voltage of the power supply and greater than zero; or
if the voltages at the first detection moment in the M historical detection periods are all higher than the first voltage threshold and the voltages at the second detection moment in the M historical detection periods are all lower than the second voltage threshold, or the voltages at the first detection moment in the M historical detection periods are all lower than the second voltage threshold and the voltages at the second detection moment in the M historical detection periods are all higher than the first voltage threshold, determining that the phase buck circuit is faulty; otherwise, determining that the current-phase buck circuit is not faulty; and

if the phase buck circuit is faulty, sending a disable driving signal to the drive circuit, to indicate the drive circuit stop driving the phase buck circuit.

6. The method according to claim 5 , wherein the detection period comprises a first detection moment and a second detection moment, the first detection moment is a time period in which a first MOS transistor in the phase buck circuit is on, and the second detection moment is a time period in which a second MOS transistor in the phase buck circuit is on; and
the determining, based on the voltage in the current detection period, whether the phase buck circuit is currently faulty comprises:
if a voltage at the first detection moment in the current detection period is higher than a first voltage threshold and a voltage at the second detection moment in the current detection period is lower than a second voltage threshold, or the voltage at the first detection moment in the current detection period is lower than the second voltage threshold and the voltage at the second detection moment in the current detection period is higher than the first voltage threshold, obtaining voltages in M historical detection periods, wherein the M historical detection periods and the current detection period are consecutive, M is a positive integer, the first voltage threshold is greater than a half of a voltage of the power supply and less than the voltage of the power supply, and the second voltage threshold is less than the half of the voltage of the power supply and greater than zero;
determining a voltage difference between the voltage at the first detection moment and the voltage at the second detection moment in the current detection period, and determining a voltage difference between the voltage at the first detection moment and the voltage at the second detection moment in each historical detection period, to obtain M+1 voltage differences; and
if the M+1 voltage differences are all greater than a third voltage threshold, determining that the phase buck circuit is faulty; otherwise, determining that the phase buck circuit is not faulty, wherein the third voltage threshold is less than the voltage of the power supply and greater than zero.

7. The method according to claim 5 , wherein the detection period comprises a first detection moment and a second detection moment, the first detection moment is a time period in which a first MOS transistor in the phase buck circuit is on, and the second detection momen

Assignees

• Huawei Tech Co Ltd

Inventors

• Lu Yuliang
• Zhou Wenbo
• Zheng Yuanhui
• Li Limin

Classifications

• H02M3/155

  using semiconductor devices only · CPC title

• H02M1/08

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• G01R31/40

  Testing power supplies (testing photovoltaic devices H02S50/10) · CPC title

• G01R19/16566

  Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 · CPC title

• H02H7/1213 Primary

  for DC-DC converters · CPC title